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authorHuang Shijie <b32955@freescale.com>2012-01-09 15:59:01 +0800
committerJason Liu <r64343@freescale.com>2012-01-19 12:41:32 +0800
commit1e2db73fbaf8665e7264441d26e304dc06bb5746 (patch)
tree4b623f1cc4dcf7a5d6e12967253c1cad71fba83a /drivers/mtd
parentccc6e60f696abb1601e527b7852e53235d2726b6 (diff)
ENGR00169906-2 GPMI : setup the TIMING1 for ready/busy
The TIMING1 specifies the timeouts used when monitoring the NAND READY pin and IOWAIT signals. We should set a default value for it. Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/gpmi-nfc/hal-mx50.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/mtd/nand/gpmi-nfc/hal-mx50.c b/drivers/mtd/nand/gpmi-nfc/hal-mx50.c
index 6545c84007f9..c8238b23e846 100644
--- a/drivers/mtd/nand/gpmi-nfc/hal-mx50.c
+++ b/drivers/mtd/nand/gpmi-nfc/hal-mx50.c
@@ -1,7 +1,7 @@
/*
* Freescale GPMI NFC NAND Flash Driver
*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
* Copyright (C) 2008 Embedded Alley Solutions, Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -525,6 +525,10 @@ static void begin(struct gpmi_nfc_data *this)
clk_enable(ahb_max_clk);
clk_enable(resources->clock);
+ /* set ready/busy timeout */
+ writel(BF_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT(0x500),
+ resources->gpmi_regs + HW_GPMI_TIMING1);
+
/* Get the timing information we need. */
nfc->clock_frequency_in_hz = clk_get_rate(resources->clock);
gpmi_nfc_compute_hardware_timing(this, &hw);