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authorAllen Xu <allen.xu@freescale.com>2012-04-10 11:37:37 +0800
committerAllen Xu <allen.xu@freescale.com>2012-04-11 10:13:00 +0800
commit38eaf3e609c028b40c2e364703f6e98e656912c8 (patch)
treed6010569a8efaf2b79256f78b80f7db86c9387f8 /drivers/mtd
parent3e325954714f21a66fba38816de1c5f76403b47a (diff)
ENGR00177241-2 mx6 close APBH DMA clock when no I/O operation
When there is no NAND I/O operation, close all the reference clock, include GPMI,BCH and APBH clock. Signed-off-by: Allen Xu <allen.xu@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-lib.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index 698535773ff4..e87b2026fc87 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -22,11 +22,14 @@
#include <linux/delay.h>
#include <linux/clk.h>
#include <mach/mxs.h>
+#include <mach/clock.h>
#include "gpmi-nand.h"
#include "gpmi-regs.h"
#include "bch-regs.h"
+static struct clk *mxs_dma_clk;
+
struct timing_threshod timing_default_threshold = {
.max_data_setup_cycles = (BM_GPMI_TIMING0_DATA_SETUP >>
BP_GPMI_TIMING0_DATA_SETUP),
@@ -128,6 +131,12 @@ int gpmi_init(struct gpmi_nand_data *this)
struct resources *r = &this->resources;
int ret;
+ mxs_dma_clk = clk_get(NULL, "mxs-dma-apbh");
+ if (IS_ERR(mxs_dma_clk)) {
+ pr_err("can not get the dma clock\n");
+ ret = -ENOENT;
+ goto err_out;
+ }
ret = clk_prepare_enable(r->clock);
if (ret)
goto err_out;
@@ -719,6 +728,13 @@ void gpmi_begin(struct gpmi_nand_data *this)
pr_err("We failed in enable the clk\n");
goto err_out;
}
+ if (!clk_get_usecount(mxs_dma_clk)) {
+ ret = clk_prepare_enable(mxs_dma_clk);
+ if (ret) {
+ pr_err("We failed in enable the dma clk\n");
+ goto err_out;
+ }
+ }
/* set ready/busy timeout */
writel(0x500 << BP_GPMI_TIMING1_BUSY_TIMEOUT,
@@ -784,6 +800,8 @@ void gpmi_end(struct gpmi_nand_data *this)
{
struct resources *r = &this->resources;
clk_disable_unprepare(r->clock);
+ if (clk_get_usecount(mxs_dma_clk))
+ clk_disable_unprepare(mxs_dma_clk);
}
/* Clears a BCH interrupt. */