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authorRafał Miłecki <zajec5@gmail.com>2014-08-19 09:14:16 +0200
committerBrian Norris <computersforpeace@gmail.com>2014-09-17 23:25:01 -0700
commitdfbd7dda0b8dc0bb2b255d173f4e8ffbe24c5764 (patch)
tree4af3ed65752f3e128d662a24563ab971d5b4253f /drivers/mtd
parent90de63324f0abc84f8c1ba56b2848c338cfda1cd (diff)
mtd: bcm47xxnflash: NAND_CMD_RESET support
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c b/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
index 30df67a914b2..82844efcf189 100644
--- a/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
+++ b/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
@@ -14,6 +14,7 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#include <linux/bcma/bcma.h>
/* Broadcom uses 1'000'000 but it seems to be too many. Tests on WNDR4500 has
@@ -226,7 +227,10 @@ static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd,
switch (command) {
case NAND_CMD_RESET:
- pr_warn("Chip reset not implemented yet\n");
+ nand_chip->cmd_ctrl(mtd, command, NAND_CTRL_CLE);
+
+ ndelay(100);
+ nand_wait_ready(mtd);
break;
case NAND_CMD_READID:
ctlcode = NCTL_CSA | 0x01000000 | NCTL_CMD1W | NCTL_CMD0;