diff options
author | Yuchou Gan <yuchou.gan@nxp.com> | 2018-01-26 22:34:54 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
commit | c9f139a3c38037e12afea671987349f47d8ccd4b (patch) | |
tree | a3c6e64bd35462861d1acf8848655886c90535db /drivers/mxc/gpu-viv | |
parent | d1a2a9db612873e2df52eee33cad4605e716cda3 (diff) |
MGS-3616 [#ccc] Integrate 6.2.4.p1.pre2 hal driver to linux kernel
Update the gpu kernel to 6.2.4.p1.pre2
Date: Jan 26, 2017
Signed-off-by: Yuchou Gan yuchou.gan@nxp.com
Diffstat (limited to 'drivers/mxc/gpu-viv')
89 files changed, 5807 insertions, 813 deletions
diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.c index 1551da9f329d..954579c96cd7 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.c +++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -2625,6 +2625,7 @@ gckCONTEXT_Update( gcsCONTEXT_PTR buffer; gcsSTATE_MAP_PTR map; gctBOOL needCopy = gcvFALSE; + gcsSTATE_DELTA_PTR nDelta; gcsSTATE_DELTA_PTR uDelta = gcvNULL; gcsSTATE_DELTA_PTR kDelta = gcvNULL; gcsSTATE_DELTA_RECORD_PTR record; @@ -2675,18 +2676,20 @@ gckCONTEXT_Update( = (gctUINT32)gcmPTR2INT32(Context); #endif - if (StateDelta != gcvNULL) + /* Are there any pending deltas? */ + if (buffer->deltaCount != 0) { /* Get the state map. */ map = Context->map; /* Get the first delta item. */ - uDelta = StateDelta; + uDelta = buffer->delta; /* Reset the vertex stream count. */ elementCount = 0; /* Merge all pending deltas. */ + for (i = 0; i < buffer->deltaCount; i += 1) { /* Get access to the state delta. */ gcmkONERROR(gckKERNEL_OpenUserData( @@ -2804,6 +2807,13 @@ gckCONTEXT_Update( elementCount = kDelta->elementCount; } + /* Dereference delta. */ + kDelta->refCount -= 1; + gcmkASSERT(kDelta->refCount >= 0); + + /* Get the next state delta. */ + nDelta = gcmUINT64_TO_PTR(kDelta->next); + if (dirtyRecordArraySize) { /* Get access to the state records. */ @@ -2824,6 +2834,9 @@ gckCONTEXT_Update( uDelta, gcmSIZEOF(gcsSTATE_DELTA), (gctPOINTER *) &kDelta )); + + /* Update the user delta pointer. */ + uDelta = nDelta; } /* Hardware disables all input attribute when the attribute 0 is programmed, @@ -2960,8 +2973,73 @@ gckCONTEXT_Update( nop += 2; } } + /* Reset pending deltas. */ + buffer->deltaCount = 0; + buffer->delta = gcvNULL; } + if (StateDelta) + { + /* Set state delta user pointer. */ + uDelta = StateDelta; + + /* Get access to the state delta. */ + gcmkONERROR(gckKERNEL_OpenUserData( + kernel, needCopy, + &_stateDelta, + uDelta, gcmSIZEOF(gcsSTATE_DELTA), + (gctPOINTER *) &kDelta + )); + + /* State delta cannot be attached to anything yet. */ + if (kDelta->refCount != 0) + { + gcmkTRACE( + gcvLEVEL_ERROR, + "%s(%d): kDelta->refCount = %d (has to be 0).\n", + __FUNCTION__, __LINE__, + kDelta->refCount + ); + } + + /* Attach to all contexts. */ + buffer = Context->buffer; + + do + { + /* Attach to the context if nothing is attached yet. If a delta + is allready attached, all we need to do is to increment + the number of deltas in the context. */ + if (buffer->delta == gcvNULL) + { + buffer->delta = uDelta; + } + + /* Update reference count. */ + kDelta->refCount += 1; + + /* Update counters. */ + buffer->deltaCount += 1; + + /* Get the next context buffer. */ + buffer = buffer->next; + + if (buffer == gcvNULL) + { + gcmkONERROR(gcvSTATUS_NOT_FOUND); + } + } + while (Context->buffer != buffer); + + /* Close access to the current state delta. */ + gcmkONERROR(gckKERNEL_CloseUserData( + kernel, needCopy, + gcvTRUE, + uDelta, gcmSIZEOF(gcsSTATE_DELTA), + (gctPOINTER *) &kDelta + )); + + } /* Schedule an event to mark the context buffer as available. */ gcmkONERROR(gckEVENT_Signal( buffer->eventObj, buffer->signal, gcvKERNEL_PIXEL diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.h b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.h index ea80365c21d5..7582f8e9224b 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.h +++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_context.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -100,6 +100,12 @@ typedef struct _gcsCONTEXT gctPOINTER link2D; gctPOINTER link3D; + /* The number of pending state deltas. */ + gctUINT deltaCount; + + /* Pointer to the first delta to be applied. */ + gcsSTATE_DELTA_PTR delta; + /* Next context buffer. */ gcsCONTEXT_PTR next; } diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c index 7c027902e7cc..f960e7b8d6ba 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c +++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -1692,7 +1692,6 @@ gckHARDWARE_Construct( hardware->object.type = gcvOBJ_HARDWARE; hardware->os = Os; hardware->core = Core; - hardware->forcePowerOff = gcvTRUE; gcmkONERROR(_GetHardwareSignature(hardware, Os, Core, &hardware->signature)); @@ -1814,8 +1813,6 @@ gckHARDWARE_Construct( gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerMutex)); gcmkONERROR(gckOS_CreateSemaphore(Os, &hardware->globalSemaphore)); - hardware->startIsr = gcvNULL; - hardware->stopIsr = gcvNULL; #if gcdPOWEROFF_TIMEOUT hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT; @@ -7413,7 +7410,6 @@ gckHARDWARE_SetPowerManagementState( #endif gctUINT32 process, thread; gctBOOL commandStarted = gcvFALSE; - gctBOOL isrStarted = gcvFALSE; #if gcdENABLE_PROFILING gctUINT64 time, freq, mutexTime, onTime, stallTime, stopTime, delayTime, @@ -7978,17 +7974,7 @@ gckHARDWARE_SetPowerManagementState( if (broadcast) { /* Check for idle. */ - gctINT32 try = 0; - for(try = 0; try < 10; try++) - { - gcmkONERROR(gckHARDWARE_QueryIdle(Hardware, &idle)); - if(idle || !Hardware->forcePowerOff) - break; - else - gckOS_Delay(os,1); - } - - Hardware->forcePowerOff = gcvFALSE; + gcmkONERROR(gckHARDWARE_QueryIdle(Hardware, &idle)); if (!idle) { @@ -8018,12 +8004,6 @@ gckHARDWARE_SetPowerManagementState( { /* Stop the command parser. */ gcmkONERROR(gckCOMMAND_Stop(command)); - - /* Stop the Isr. */ - if (Hardware->stopIsr) - { - gcmkONERROR(Hardware->stopIsr(Hardware->isrContext)); - } } /* Flush Cache before Power Off. */ @@ -8173,13 +8153,6 @@ gckHARDWARE_SetPowerManagementState( /* Start the command processor. */ gcmkONERROR(gckCOMMAND_Start(command)); commandStarted = gcvTRUE; - - if (Hardware->startIsr) - { - /* Start the Isr. */ - gcmkONERROR(Hardware->startIsr(Hardware->isrContext)); - isrStarted = gcvTRUE; - } } /* Get time until started. */ @@ -8269,11 +8242,6 @@ OnError: gcmkVERIFY_OK(gckCOMMAND_Stop(command)); } - if (isrStarted) - { - gcmkVERIFY_OK(Hardware->stopIsr(Hardware->isrContext)); - } - if (acquired) { /* Release semaphore. */ @@ -10525,41 +10493,6 @@ gckHARDWARE_NeedBaseAddress( return gcvSTATUS_OK; } -gceSTATUS -gckHARDWARE_SetIsrManager( - IN gckHARDWARE Hardware, - IN gctISRMANAGERFUNC StartIsr, - IN gctISRMANAGERFUNC StopIsr, - IN gctPOINTER Context - ) -{ - gceSTATUS status = gcvSTATUS_OK; - - gcmkHEADER_ARG("Hardware=0x%x, StartIsr=0x%x, StopIsr=0x%x, Context=0x%x", - Hardware, StartIsr, StopIsr, Context); - - /* Verify the arguments. */ - gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE); - - if (StartIsr == gcvNULL || - StopIsr == gcvNULL) - { - status = gcvSTATUS_INVALID_ARGUMENT; - - gcmkFOOTER(); - return status; - } - - Hardware->startIsr = StartIsr; - Hardware->stopIsr = StopIsr; - Hardware->isrContext = Context; - - /* Success. */ - gcmkFOOTER(); - - return status; -} - /******************************************************************************* ** ** gckHARDWARE_IsFeatureAvailable diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h index 8cc00eff4719..4711bd1c5a6c 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h +++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -191,10 +191,6 @@ struct _gckHARDWARE gctBOOL powerState; gctPOINTER globalSemaphore; - gctISRMANAGERFUNC startIsr; - gctISRMANAGERFUNC stopIsr; - gctPOINTER isrContext; - gctUINT32 mmuVersion; /* Type */ @@ -249,8 +245,6 @@ struct _gckHARDWARE gcsHARDWARE_PAGETABLE_ARRAY pagetableArray; gctUINT64 contextID; - - gctBOOL forcePowerOff; }; typedef struct _gcsFEDescriptor diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_recorder.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_recorder.c index 4ea214e14f31..b6c2ce05cb15 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_recorder.c +++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_recorder.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c index 04a994425e69..cfd618c54337 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h index f645b678895b..ab495f57b512 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c index 73eda6340796..7f71b8fb39ad 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h index c2d16cbe7128..236c0afb14e6 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -94,9 +94,6 @@ struct _gckVGHARDWARE gctUINT32 powerThread; gceCHIPPOWERSTATE chipPowerState; gceCHIPPOWERSTATE chipPowerStateGlobal; - gctISRMANAGERFUNC startIsr; - gctISRMANAGERFUNC stopIsr; - gctPOINTER isrContext; gctPOINTER pageTableDirty; #if gcdPOWEROFF_TIMEOUT gctUINT32 powerOffTime; diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c index 290336f38fb0..2f16d6d71c92 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -149,7 +149,6 @@ gctCONST_STRING _DispatchText[] = gcmDEFINE2TEXT(gcvHAL_GET_VIDEO_MEMORY_FD), gcmDEFINE2TEXT(gcvHAL_CONFIG_POWER_MANAGEMENT), gcmDEFINE2TEXT(gcvHAL_WRAP_USER_MEMORY), - gcmDEFINE2TEXT(gcvHAL_RELEASE_USER_MEMORY), gcmDEFINE2TEXT(gcvHAL_WAIT_FENCE), #if gcdDEC_ENABLE_AHB gcmDEFINE2TEXT(gcvHAL_DEC300_READ), @@ -1033,6 +1032,17 @@ gckKERNEL_AllocateLinearMemory( *Pool = gcvPOOL_VIRTUAL; } + if (Flag & gcvALLOC_FLAG_DMABUF_EXPORTABLE) + { + gctSIZE_T pageSize = 0; + gckOS_GetPageSize(Kernel->os, &pageSize); + + /* Usually, the exported dmabuf might be later imported to DRM, + ** while DRM requires input size to be page aligned. + */ + Bytes = gcmALIGN(Bytes, pageSize); + } + AllocateMemory: /* Get initial pool. */ @@ -1112,14 +1122,21 @@ AllocateMemory: if (gcmIS_SUCCESS(status)) { /* Allocate memory. */ + if ((Flag & videoMemory->capability) != Flag) + { + status = gcvSTATUS_NOT_SUPPORTED; + + gcmkFATAL("%s(%d): Reject alloc because VIDMEM (pool=%d) caps=0x%x cannot meet required Flag=0x%x", + __FUNCTION__, __LINE__, pool, videoMemory->capability, Flag); + } #if defined(gcdLINEAR_SIZE_LIMIT) /* 512 KB */ - if (Bytes > gcdLINEAR_SIZE_LIMIT) + else if (Bytes > gcdLINEAR_SIZE_LIMIT) { status = gcvSTATUS_OUT_OF_MEMORY; } - else #endif + else { hasFastPools = gcvTRUE; status = gckVIDMEM_AllocateLinear(Kernel, @@ -3200,33 +3217,6 @@ gckKERNEL_Dispatch( 0)); break; - case gcvHAL_RELEASE_USER_MEMORY: - { - gckVIDMEM_NODE nodeObject; - gctBOOL asynchronous = gcvFALSE; - gctUINT32 node = Interface->u.ReleaseUserMemory.node; - - gcmkONERROR(gckKERNEL_RemoveProcessDB(Kernel, - processID, - gcvDB_VIDEO_MEMORY_LOCKED, - gcmINT2PTR(node))); - - gcmkONERROR(gckKERNEL_ReleaseVideoMemory( Kernel, processID, node)); - - gcmkONERROR(gckVIDMEM_HANDLE_Lookup(Kernel, processID, node, &nodeObject)); - - gcmkONERROR(gckVIDMEM_Unlock(Kernel, nodeObject, gcvSURF_BITMAP, &asynchronous)); - if (gcvTRUE == asynchronous) - { - gcmkONERROR(gckCOMMAND_Stall(Kernel->command, gcvFALSE)); - gcmkVERIFY_OK(gckVIDMEM_Unlock(Kernel, nodeObject, gcvSURF_BITMAP, gcvNULL)); - } - - gcmkONERROR(gckVIDMEM_NODE_Dereference(Kernel, nodeObject)); - } - - break; - case gcvHAL_WAIT_FENCE: gcmkONERROR(gckKERNEL_WaitFence( Kernel, @@ -3461,23 +3451,7 @@ gckKERNEL_AttachProcessEx( if (Kernel->vg == gcvNULL) #endif { - gctBOOL empty = gcvFALSE; - - while (gcvTRUE) - { - /* Check whether the event queue is empty. */ - gcmkONERROR(gckEVENT_IsEmpty(Kernel->eventObj, &empty)); - - if (empty == gcvTRUE) - { - break; - } - - gcmkVERIFY_OK(gckOS_Delay(Kernel->os, 1)); - }; - /* Last client detached, switch to SUSPEND power state. */ - Kernel->hardware->forcePowerOff = gcvTRUE; gcmkONERROR(gckOS_Broadcast(Kernel->os, Kernel->hardware, gcvBROADCAST_LAST_PROCESS)); @@ -4298,7 +4272,7 @@ gckKERNEL_AllocateVirtualCommandBuffer( { gceSTATUS status; gckOS os = Kernel->os; - gckVIRTUAL_COMMAND_BUFFER_PTR buffer; + gckVIRTUAL_COMMAND_BUFFER_PTR buffer; gcmkHEADER_ARG("Os=0x%X InUserSpace=%d *Bytes=%lu", os, InUserSpace, gcmOPT_VALUE(Bytes)); diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h index f6d5d8b70207..f5d23bd77889 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -1080,6 +1080,9 @@ struct _gckVIDMEM gctSIZE_T freeBytes; gctSIZE_T minFreeBytes; + /* caps inherit from its allocator, ~0u if allocator was not applicable. */ + gctUINT32 capability; + /* Mapping for each type of surface. */ gctINT mapping[gcvSURF_NUM_TYPES]; diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_async_command.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_async_command.c index 12bbbb005da9..2a0c5547215e 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_async_command.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_async_command.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c index 2044cf1de7bb..7a6511828b18 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c index 4890779a3c71..6167212eff38 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c index 765231be9e5e..49c261a633f0 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_debug.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_debug.c index 73480296ee7d..f526793296d9 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_debug.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_debug.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c index c5f067a8db31..1246fe04e572 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -171,7 +171,7 @@ OnError: return gcvSTATUS_OK; } -gceSTATUS +static gceSTATUS gckEVENT_IsEmpty( IN gckEVENT Event, OUT gctBOOL_PTR IsEmpty diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_heap.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_heap.c index 1b61b4a3eeda..5c4835abb3e0 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_heap.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_heap.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c index b4d53a3c3648..057fad6b559d 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c index 149cced61430..d78e78bd698f 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu_vg.c index 858e2f4f3730..f6e687b22af2 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_power.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_power.c index 5508c10e3f12..92839cb6227f 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_power.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_power.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_precomp.h b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_precomp.h index 91f6aeffcd91..ee2b12245e8c 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_precomp.h +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_precomp.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security.c index e783582551ff..6c169a2a536a 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security_v1.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security_v1.c index 6bb7370d1157..89a4333f6f2f 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security_v1.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_security_v1.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.c index 167e65d37a85..93a914c9d79a 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.h b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.h index 16c8ad2e0ca5..63da8837d67c 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c index 82c3471529fb..2fcc52c67fe9 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c +++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -435,6 +435,7 @@ gckVIDMEM_Construct( memory->bytes = heapBytes; memory->freeBytes = heapBytes; memory->minFreeBytes = heapBytes; + memory->capability = ~0u; memory->threshold = Threshold; memory->mutex = gcvNULL; @@ -2898,10 +2899,17 @@ static struct dma_buf_ops _dmabuf_ops = .unmap_dma_buf = _dmabuf_unmap, .mmap = _dmabuf_mmap, .release = _dmabuf_release, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) + .map_atomic = _dmabuf_kmap, + .unmap_atomic = _dmabuf_kunmap, + .map = _dmabuf_kmap, + .unmap = _dmabuf_kunmap, +# else .kmap_atomic = _dmabuf_kmap, .kunmap_atomic = _dmabuf_kunmap, .kmap = _dmabuf_kmap, .kunmap = _dmabuf_kunmap, +# endif }; #endif diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_feature_database.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_feature_database.h index 9833ac43e91f..6cc314ddd6b4 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_feature_database.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_feature_database.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -53,7 +53,7 @@ *****************************************************************************/ -/*Auto created on 2017-10-12 14:21*/ +/*Auto created on 2018-01-13 17:56*/ #ifndef _gc_feature_database_h_ #define _gc_feature_database_h_ @@ -95,6 +95,7 @@ typedef struct gctUINT32 TPEngine_PwlLUTSize; gctUINT32 VIP_SRAM_SIZE; gctUINT32 TPEngine_CoreCount; + gctUINT32 AXI_SRAM_SIZE; gctUINT32 REG_FastClear:1; gctUINT32 REG_SpecialAntiAliasing:1; gctUINT32 REG_Pipe3D:1; @@ -485,6 +486,21 @@ typedef struct gctUINT32 NN_INTERLEVE8:1; gctUINT32 TP_REORDER:1; gctUINT32 PE_DEPTH_ONLY_OQFIX:1; + gctUINT32 TP_LRN:1; + gctUINT32 TX_SEAMLESS_CUBE:1; + gctUINT32 TX_SNORM_SUPPORT:1; + gctUINT32 TP_MAX_POOLING_STRIDE1:1; + gctUINT32 SH_SCATTER_GATHER:1; + gctUINT32 HWMANAGED_LS:1; + gctUINT32 NN_FP16_ALU:1; + gctUINT32 NN_INT16_ALU:1; + gctUINT32 TP_ROI_POOLING:1; + gctUINT32 NN_ZDP3:1; + gctUINT32 NN_ZDP6:1; + gctUINT32 NN_INT8_SCALE:1; + gctUINT32 NN_POWER_ISOLATION:1; + gctUINT32 SWTILING_PHASE1:1; + gctUINT32 SH_IMAGE_ENABLE_FIX:1; } gcsFEATURE_DATABASE; static gcsFEATURE_DATABASE gChipInfo[] = { @@ -525,6 +541,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -915,6 +932,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* dc0000_5560 */ { @@ -953,6 +985,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -1343,6 +1376,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc200_4650 */ { @@ -1381,6 +1429,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -1771,6 +1820,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc200_4621 */ { @@ -1809,6 +1873,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -2199,6 +2264,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc300_4650 */ { @@ -2237,6 +2317,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -2627,6 +2708,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc300_4650_guoke */ { @@ -2665,6 +2761,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -3055,6 +3152,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc300_4_6_6_rc0 */ { @@ -3093,6 +3205,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -3483,6 +3596,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5007 */ { @@ -3521,6 +3649,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -3911,6 +4040,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5220 */ { @@ -3949,6 +4093,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -4339,6 +4484,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5303 */ { @@ -4377,6 +4537,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -4767,6 +4928,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5303_1 */ { @@ -4805,6 +4981,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -5195,6 +5372,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5340 */ { @@ -5233,6 +5425,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -5623,6 +5816,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320c_5341 */ { @@ -5661,6 +5869,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -6051,6 +6260,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc320_5341 */ { @@ -6089,6 +6313,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -6479,6 +6704,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520l_5_3_5_rc0 */ { @@ -6517,6 +6757,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -6907,6 +7148,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc355_v121_rc5 */ { @@ -6945,6 +7201,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -7335,6 +7592,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc355_v121x */ { @@ -7373,6 +7645,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -7763,6 +8036,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc355_8Kx8K */ { @@ -7801,6 +8089,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -8191,6 +8480,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc400_4633 */ { @@ -8229,6 +8533,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -8619,6 +8924,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc600_4633 */ { @@ -8657,6 +8977,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -9047,6 +9368,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc400_4645 */ { @@ -9085,6 +9421,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -9475,6 +9812,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc400L_0x465x */ { @@ -9513,6 +9865,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -9903,6 +10256,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000nano_0x4652 */ { @@ -9941,6 +10309,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -10331,6 +10700,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000nano_0x4652 */ { @@ -10369,6 +10753,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -10759,6 +11144,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc420_5325 */ { @@ -10797,6 +11197,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -11187,6 +11588,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc420_5336 */ { @@ -11225,6 +11641,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -11615,6 +12032,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc420cpd_533rc7a */ { @@ -11653,6 +12085,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -12043,6 +12476,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc428_5421 */ { @@ -12081,6 +12529,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -12471,6 +12920,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc428c_5_4_2_rc3a */ { @@ -12509,6 +12973,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -12899,6 +13364,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520_5341 */ { @@ -12937,6 +13417,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -13327,6 +13808,465 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* gc520l_5341_rc1b */ + { + 0x520, /* ChipID */ + 0x5341, /* ChipRevision */ + 0x5202, /* ProductID */ + 0x0, /* EcoID */ + 0x0, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x1, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x8, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x200, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x100, /* gcFEATURE_VALUE_InstructionCount */ + 0xa8, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x8, /* gcFEATURE_VALUE_VaryingCount */ + 0x0, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x0, /* gcFEATURE_VALUE_L1CacheSize */ + 0x0, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x0, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x1, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x0, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x0, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x0, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x0, /* gcFEATURE_VALUE_NNCoreCount */ + 0x0, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x0, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x0, /* gcFEATURE_BIT_REG_FastClear */ + 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x0, /* gcFEATURE_BIT_REG_ZCompression */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x1, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x1, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x0, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x1, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x1, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x0, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x0, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x1, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x0, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x0, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x0, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x0, /* gcFEATURE_BIT_REG_LineLoop */ + 0x0, /* gcFEATURE_BIT_REG_LogicOp */ + 0x0, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x0, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x0, /* gcFEATURE_BIT_REG_LinearPE */ + 0x0, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x0, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x0, /* gcFEATURE_BIT_REG_EndEvent */ + 0x0, /* gcFEATURE_BIT_REG_S1S8 */ + 0x0, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x0, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x0, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x1, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x1, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x0, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x1, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x0, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x0, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x0, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x0, /* gcFEATURE_BIT_REG_Generics */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x0, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x0, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x0, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_ACE */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x0, /* gcFEATURE_BIT_REG_NewHZ */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x0, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x0, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x0, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x0, /* gcFEATURE_BIT_REG_EEZ */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x1, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x0, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x0, /* gcFEATURE_BIT_REG_Halti4 */ + 0x0, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x0, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x0, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x0, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x0, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x0, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x0, /* gcFEATURE_BIT_REG_RSS8 */ + 0x0, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x0, /* gcFEATURE_BIT_REG_Halti5 */ + 0x0, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x0, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x0, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x0, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x0, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x0, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x0, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x0, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x0, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x0, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x0, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x0, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x0, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x0, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x0, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x0, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x0, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x0, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x0, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x0, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x0, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x0, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x0, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x0, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x0, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x0, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x0, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x0, /* gcFEATURE_BIT_SECURITY */ + 0x0, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x0, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x0, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x0, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x0, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x0, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x0, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x0, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x0, /* gcFEATURE_BIT_DRAWID */ + 0x0, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x0, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x0, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x0, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x0, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x0, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x0, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x0, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x0, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x0, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x0, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x0, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x0, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x0, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x0, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x0, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x0, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x0, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x0, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520_5540_rc0 */ { @@ -13365,6 +14305,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -13755,6 +14696,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520l_5_3_4_rc2b */ { @@ -13793,6 +14749,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x1, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -14183,6 +15140,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520c_5_5_0 */ { @@ -14221,6 +15193,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -14611,6 +15584,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520c_5_5_4_rc1 */ { @@ -14649,6 +15637,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -15039,6 +16028,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520sp_5_5_2_rc0a */ { @@ -15077,6 +16081,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -15467,6 +16472,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520_v552_rc1 */ { @@ -15505,6 +16525,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -15895,6 +16916,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc520_5_5_3_rc2a */ { @@ -15933,6 +16969,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -16323,6 +17360,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc600L_0x465x */ { @@ -16361,6 +17413,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -16751,6 +17804,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000nanoultra_4_6_5_rc3a */ { @@ -16789,6 +17857,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -17179,6 +18248,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000nanoultra_4_6_5_rc3b */ { @@ -17217,6 +18301,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -17607,6 +18692,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000nanoultra_4_6_5_rc3e */ { @@ -17645,6 +18745,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -18035,6 +19136,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc620_5_5_3_rc0 */ { @@ -18073,6 +19189,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -18463,6 +19580,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc620_5_5_5_rc0d */ { @@ -18501,6 +19633,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -18891,6 +20024,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc620tpc_5_5_6_rc0a */ { @@ -18929,6 +20077,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x0, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x0, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -19319,6 +20468,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc860L_0x464x */ { @@ -19357,6 +20521,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -19747,6 +20912,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc880_5106 */ { @@ -19785,6 +20965,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -20175,6 +21356,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc880_5122 */ { @@ -20213,6 +21409,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -20603,6 +21800,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc880TM_0x512x */ { @@ -20641,6 +21853,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -21031,6 +22244,465 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* gc880TM_0x512x */ + { + 0x880, /* ChipID */ + 0x5124, /* ChipRevision */ + 0x70007, /* ProductID */ + 0x0, /* EcoID */ + 0x103, /* CustomerID */ + 0x2, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x8, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x200, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x240, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0xc, /* gcFEATURE_VALUE_VaryingCount */ + 0x0, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x0, /* gcFEATURE_VALUE_L1CacheSize */ + 0x0, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x0, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x1, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x0, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x0, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x0, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x0, /* gcFEATURE_VALUE_NNCoreCount */ + 0x0, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x0, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x0, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x1, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_FastScaler */ + 0x0, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x1, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x0, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x0, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x0, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x0, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x0, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x0, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x0, /* gcFEATURE_BIT_REG_LinearPE */ + 0x0, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x0, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x0, /* gcFEATURE_BIT_REG_S1S8 */ + 0x0, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x0, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x0, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x0, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x0, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x0, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x0, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x0, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x0, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x0, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x0, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x0, /* gcFEATURE_BIT_REG_Generics */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x0, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x0, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_ACE */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x0, /* gcFEATURE_BIT_REG_NewHZ */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x0, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x0, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x0, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x0, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x0, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x0, /* gcFEATURE_BIT_REG_EEZ */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x0, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x0, /* gcFEATURE_BIT_REG_Halti4 */ + 0x0, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x0, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x0, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x0, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x0, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x0, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x0, /* gcFEATURE_BIT_REG_RSS8 */ + 0x0, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x0, /* gcFEATURE_BIT_REG_Halti5 */ + 0x0, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x0, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x0, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x0, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x0, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x0, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x0, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x0, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x0, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x0, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x0, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x0, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x0, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x0, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x0, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x0, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x0, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x0, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x0, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x0, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x0, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x0, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x0, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x0, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x0, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x0, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x0, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x0, /* gcFEATURE_BIT_SECURITY */ + 0x0, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x0, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x0, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x0, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x0, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x0, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x0, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x0, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x0, /* gcFEATURE_BIT_DRAWID */ + 0x0, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x0, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x0, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x0, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x0, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x0, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x0, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x0, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x0, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x0, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x0, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x0, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x0, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x0, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x0, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x0, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x0, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x0, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x0, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc900_5250 */ { @@ -21069,6 +22741,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -21459,6 +23132,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc1000_5036 */ { @@ -21497,6 +23185,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -21887,6 +23576,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc1000_5037 */ { @@ -21925,6 +23629,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -22315,6 +24020,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc1000_5037_1 */ { @@ -22353,6 +24073,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -22743,6 +24464,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc1000_5039 */ { @@ -22781,6 +24517,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -23171,6 +24908,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc1500_5246 */ { @@ -23209,6 +24961,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -23599,6 +25352,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc2000_5108 */ { @@ -23637,6 +25405,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -24027,6 +25796,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc2000_5140 */ { @@ -24065,6 +25849,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -24455,6 +26240,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc2000w_5_1_4_rc0e */ { @@ -24493,6 +26293,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -24883,6 +26684,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x0, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc2500_5422 */ { @@ -24921,6 +26737,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -25311,6 +27128,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc6400_5422 */ { @@ -25349,6 +27181,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -25739,6 +27572,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc3000_5435 */ { @@ -25777,6 +27625,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -26167,6 +28016,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc2000_ffff5450 */ { @@ -26205,6 +28069,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -26595,6 +28460,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc3000_5450 */ { @@ -26633,6 +28513,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -27023,6 +28904,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc3000_5451 */ { @@ -27061,6 +28957,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -27451,6 +29348,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_551x */ { @@ -27489,6 +29401,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -27879,6 +29792,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_5512 */ { @@ -27917,6 +29845,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -28307,6 +30236,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_5514 */ { @@ -28345,6 +30289,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -28735,6 +30680,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc4000_5222 */ { @@ -28773,6 +30733,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -29163,6 +31124,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc4000_5245 */ { @@ -29201,6 +31177,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -29591,6 +31568,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc5000_5434 */ { @@ -29629,6 +31621,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -30019,6 +32012,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x0, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_551x */ { @@ -30057,6 +32065,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -30447,6 +32456,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_5513 */ { @@ -30485,6 +32509,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -30875,6 +32900,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gcXAQ2_CMODEL */ { @@ -30913,6 +32953,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -31303,6 +33344,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_600x */ { @@ -31341,6 +33397,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -31731,6 +33788,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6008 */ { @@ -31769,6 +33841,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -32159,6 +34232,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XSVX_600x */ { @@ -32197,6 +34285,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -32587,6 +34676,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XSVX_6008 */ { @@ -32625,6 +34729,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -33015,6 +35120,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XSVX_6009 */ { @@ -33053,6 +35173,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -33443,6 +35564,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_6100 */ { @@ -33481,6 +35617,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -33871,6 +36008,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_6100 */ { @@ -33909,6 +36061,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -34299,6 +36452,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6100 */ { @@ -34337,6 +36505,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -34727,6 +36896,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip7000UL_6100 */ { @@ -34765,6 +36949,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -35155,6 +37340,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_6200 */ { @@ -35193,6 +37393,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -35583,6 +37784,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000UL_6200 */ { @@ -35621,6 +37837,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -36011,6 +38228,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000ULVX_6200 */ { @@ -36049,6 +38281,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -36439,6 +38672,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip7000L_6200 */ { @@ -36477,6 +38725,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -36867,6 +39116,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip7000UL_6200 */ { @@ -36905,6 +39169,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -37295,6 +39560,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip7000UL_6211 */ { @@ -37333,6 +39613,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -37723,6 +40004,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000UL_6211 */ { @@ -37761,6 +40057,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -38151,6 +40448,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000ULFN_6211 */ { @@ -38189,6 +40501,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -38579,6 +40892,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000UL_6211 */ { @@ -38617,6 +40945,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -39007,6 +41336,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vipnano */ { @@ -39014,7 +41358,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x7000, /* ChipRevision */ 0x5080001, /* ProductID */ 0x0, /* EcoID */ - 0x23, /* CustomerID */ + 0x29, /* CustomerID */ 0x0, /* PatchVersion */ 0x0, /* FormalRelease */ 0x8, /* gcFEATURE_VALUE_Streams */ @@ -39045,6 +41389,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x1, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -39435,6 +41780,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gcnanovip */ { @@ -39473,6 +41833,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -39863,6 +42224,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vipnano-q */ { @@ -39894,13 +42270,14 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ 0x8, /* gcFEATURE_VALUE_NNCoreCount */ - 0x6, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0xc, /* gcFEATURE_VALUE_NNInputBufferDepth */ 0x40, /* gcFEATURE_VALUE_NNAccumBufferDepth */ 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x200, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ - 0x2, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x4, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x800, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -40291,6 +42668,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x1, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x1, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x1, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x1, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x1, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x1, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000UL-s */ { @@ -40329,6 +42721,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x80, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x1, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -40719,6 +43112,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000UL-q */ { @@ -40757,6 +43165,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x200, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x2, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -41147,6 +43556,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000UL */ { @@ -41185,6 +43609,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x80, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x1, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -41575,6 +44000,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip8000-q */ { @@ -41613,6 +44053,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x200, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x2, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -42000,9 +44441,24 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ - 0x1, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x1, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vipnano-d */ { @@ -42041,6 +44497,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x100, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x1, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -42431,6 +44888,2241 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* vipnano-d */ + { + 0x8000, /* ChipID */ + 0x7000, /* ChipRevision */ + 0x25080001, /* ProductID */ + 0x0, /* EcoID */ + 0x76, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x10, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x400, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x140, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x10, /* gcFEATURE_VALUE_VaryingCount */ + 0x10, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x10, /* gcFEATURE_VALUE_L1CacheSize */ + 0x200, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x14, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x0, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x10, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x4, /* gcFEATURE_VALUE_NNCoreCount */ + 0x6, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x40, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x100, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x2, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x0, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x0, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x1, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x1, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x1, /* gcFEATURE_BIT_REG_LinearPE */ + 0x1, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x1, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x1, /* gcFEATURE_BIT_REG_S1S8 */ + 0x1, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x1, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x1, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x1, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x1, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x1, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x1, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x1, /* gcFEATURE_BIT_REG_Generics */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x1, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_ACE */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x1, /* gcFEATURE_BIT_REG_NewHZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x1, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x1, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x1, /* gcFEATURE_BIT_REG_EEZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x1, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x1, /* gcFEATURE_BIT_REG_Halti4 */ + 0x1, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x1, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x1, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x1, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x1, /* gcFEATURE_BIT_REG_RSS8 */ + 0x1, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x1, /* gcFEATURE_BIT_REG_Halti5 */ + 0x1, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x1, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x1, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x1, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x1, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x1, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x1, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x1, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x1, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x1, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x1, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x1, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x1, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x1, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x1, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x1, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x1, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x1, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x1, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x1, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x1, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x1, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY */ + 0x1, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x1, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x1, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x1, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x1, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x1, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x1, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x1, /* gcFEATURE_BIT_DRAWID */ + 0x1, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x1, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x1, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x1, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x1, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x1, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x1, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x1, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x1, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x1, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x1, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x1, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x1, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x1, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x1, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x1, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x1, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x1, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x1, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x1, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x1, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* vip8000L-O */ + { + 0x8000, /* ChipID */ + 0x7000, /* ChipRevision */ + 0x85080002, /* ProductID */ + 0x0, /* EcoID */ + 0x2f, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x400, /* gcFEATURE_VALUE_ThreadCount */ + 0x10, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x4, /* gcFEATURE_VALUE_NumShaderCores */ + 0x2, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x400, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x140, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x10, /* gcFEATURE_VALUE_VaryingCount */ + 0x20, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x20, /* gcFEATURE_VALUE_L1CacheSize */ + 0x200, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x14, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x0, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x20, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x10, /* gcFEATURE_VALUE_NNCoreCount */ + 0x6, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x40, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x100, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x2, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x0, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x0, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x1, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x1, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x1, /* gcFEATURE_BIT_REG_LinearPE */ + 0x1, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x1, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x1, /* gcFEATURE_BIT_REG_S1S8 */ + 0x1, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x1, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x1, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x1, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x1, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x1, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x1, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x1, /* gcFEATURE_BIT_REG_Generics */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x1, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_ACE */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x1, /* gcFEATURE_BIT_REG_NewHZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x1, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x1, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x1, /* gcFEATURE_BIT_REG_EEZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x1, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x1, /* gcFEATURE_BIT_REG_Halti4 */ + 0x1, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x1, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x1, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x1, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x1, /* gcFEATURE_BIT_REG_RSS8 */ + 0x1, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x1, /* gcFEATURE_BIT_REG_Halti5 */ + 0x1, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x1, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x1, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x1, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x1, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x1, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x1, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x1, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x1, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x1, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x1, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x1, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x1, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x1, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x1, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x1, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x1, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x1, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x1, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x1, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x1, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x1, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY */ + 0x1, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x1, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x1, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x1, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x1, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x1, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x1, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x1, /* gcFEATURE_BIT_DRAWID */ + 0x1, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x1, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x1, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x1, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x1, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x1, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x1, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x1, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x1, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x1, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x1, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x1, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x1, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x1, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x1, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x1, /* gcFEATURE_BIT_SH_CMPLX */ + 0x1, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x1, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x1, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x1, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x1, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x1, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x1, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x1, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x1, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x1, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* vipnano-s */ + { + 0x8000, /* ChipID */ + 0x7000, /* ChipRevision */ + 0x15080001, /* ProductID */ + 0x0, /* EcoID */ + 0x23, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x10, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x400, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x140, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x10, /* gcFEATURE_VALUE_VaryingCount */ + 0x10, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x10, /* gcFEATURE_VALUE_L1CacheSize */ + 0x200, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x14, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x0, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x10, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x2, /* gcFEATURE_VALUE_NNCoreCount */ + 0x6, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0xe0, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x80, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x1, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x0, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x0, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x1, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x1, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x1, /* gcFEATURE_BIT_REG_LinearPE */ + 0x1, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x1, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x1, /* gcFEATURE_BIT_REG_S1S8 */ + 0x1, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x1, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x1, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x1, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x1, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x1, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x1, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x1, /* gcFEATURE_BIT_REG_Generics */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x1, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_ACE */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x1, /* gcFEATURE_BIT_REG_NewHZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x1, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x1, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x1, /* gcFEATURE_BIT_REG_EEZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x1, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x1, /* gcFEATURE_BIT_REG_Halti4 */ + 0x1, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x1, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x1, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x1, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x1, /* gcFEATURE_BIT_REG_RSS8 */ + 0x1, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x1, /* gcFEATURE_BIT_REG_Halti5 */ + 0x1, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x1, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x1, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x1, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x1, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x1, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x1, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x1, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x1, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x1, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x1, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x1, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x1, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x1, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x1, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x1, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x1, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x1, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x1, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x1, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x1, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x1, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY */ + 0x1, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x1, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x1, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x1, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x1, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x1, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x1, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x1, /* gcFEATURE_BIT_DRAWID */ + 0x1, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x1, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x1, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x1, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x1, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x1, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x1, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x1, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x1, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x1, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x1, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x1, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x1, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x1, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x1, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x1, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x0, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x0, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x1, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* vipnano-qi */ + { + 0x8000, /* ChipID */ + 0x7000, /* ChipRevision */ + 0x45080009, /* ProductID */ + 0x0, /* EcoID */ + 0x7d, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x10, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x400, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x140, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x10, /* gcFEATURE_VALUE_VaryingCount */ + 0x10, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x10, /* gcFEATURE_VALUE_L1CacheSize */ + 0x200, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x14, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x0, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x10, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x8, /* gcFEATURE_VALUE_NNCoreCount */ + 0xc, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x40, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x200, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x4, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x400, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x0, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x0, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x1, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x1, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x1, /* gcFEATURE_BIT_REG_LinearPE */ + 0x1, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x1, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x1, /* gcFEATURE_BIT_REG_S1S8 */ + 0x1, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x1, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x1, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x1, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x1, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x1, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x1, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x1, /* gcFEATURE_BIT_REG_Generics */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x1, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_ACE */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x1, /* gcFEATURE_BIT_REG_NewHZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x1, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x1, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x1, /* gcFEATURE_BIT_REG_EEZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x1, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x1, /* gcFEATURE_BIT_REG_Halti4 */ + 0x1, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x1, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x1, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x1, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x1, /* gcFEATURE_BIT_REG_RSS8 */ + 0x1, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x1, /* gcFEATURE_BIT_REG_Halti5 */ + 0x1, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x1, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x1, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x1, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x1, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x1, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x1, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x1, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x1, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x1, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x1, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x1, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x1, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x1, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x1, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x1, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x1, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x1, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x1, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x1, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x1, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x1, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY */ + 0x1, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x1, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x1, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x1, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x1, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x1, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x1, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x1, /* gcFEATURE_BIT_DRAWID */ + 0x1, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x1, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x1, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x1, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x1, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x1, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x1, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x1, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x1, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x1, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x1, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x1, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x1, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x1, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x1, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x1, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x0, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x1, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x1, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x1, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x1, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x1, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x1, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ + }, + /* vipnano-di */ + { + 0x8000, /* ChipID */ + 0x7000, /* ChipRevision */ + 0x25080009, /* ProductID */ + 0x0, /* EcoID */ + 0x7e, /* CustomerID */ + 0x0, /* PatchVersion */ + 0x0, /* FormalRelease */ + 0x8, /* gcFEATURE_VALUE_Streams */ + 0x40, /* gcFEATURE_VALUE_TempRegisters */ + 0x100, /* gcFEATURE_VALUE_ThreadCount */ + 0x10, /* gcFEATURE_VALUE_VertexCacheSize */ + 0x1, /* gcFEATURE_VALUE_NumShaderCores */ + 0x1, /* gcFEATURE_VALUE_NumPixelPipes */ + 0x400, /* gcFEATURE_VALUE_VertexOutputBufferSize */ + 0x0, /* gcFEATURE_VALUE_BufferSize */ + 0x200, /* gcFEATURE_VALUE_InstructionCount */ + 0x140, /* gcFEATURE_VALUE_NumberOfConstants */ + 0x1, /* gcFEATURE_VALUE_CoreCount */ + 0x10, /* gcFEATURE_VALUE_VaryingCount */ + 0x10, /* gcFEATURE_VALUE_LocalStorageSize */ + 0x10, /* gcFEATURE_VALUE_L1CacheSize */ + 0x200, /* gcFEATURE_VALUE_InstructionMemorySize */ + 0x14, /* gcFEATURE_VALUE_ShaderPCLength */ + 0x0, /* gcFEATURE_VALUE_NumResolvePipes */ + 0x10, /* gcFEATURE_VALUE_USC_MAX_PAGES */ + 0x100, /* gcFEATURE_VALUE_RESULT_WINDOW_MAX_SIZE */ + 0x40, /* gcFEATURE_VALUE_NNMadPerCore */ + 0x4, /* gcFEATURE_VALUE_NNCoreCount */ + 0xc, /* gcFEATURE_VALUE_NNInputBufferDepth */ + 0x40, /* gcFEATURE_VALUE_NNAccumBufferDepth */ + 0x0, /* gcFEATURE_VALUE_ClusterAliveMask */ + 0x400, /* gcFEATURE_VALUE_TPEngine_PwlLUTCount */ + 0x10, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ + 0x100, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ + 0x4, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x800, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ + 0x1, /* gcFEATURE_BIT_REG_FastClear */ + 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ + 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ + 0x1, /* gcFEATURE_BIT_REG_DXTTextureCompression */ + 0x0, /* gcFEATURE_BIT_REG_DebugMode */ + 0x1, /* gcFEATURE_BIT_REG_ZCompression */ + 0x0, /* gcFEATURE_BIT_REG_YUV420Filter */ + 0x1, /* gcFEATURE_BIT_REG_MSAA */ + 0x0, /* gcFEATURE_BIT_REG_DC */ + 0x0, /* gcFEATURE_BIT_REG_Pipe2D */ + 0x1, /* gcFEATURE_BIT_REG_ETC1TextureCompression */ + 0x1, /* gcFEATURE_BIT_REG_FastScaler */ + 0x1, /* gcFEATURE_BIT_REG_HighDynamicRange */ + 0x1, /* gcFEATURE_BIT_REG_YUV420Tiler */ + 0x1, /* gcFEATURE_BIT_REG_ModuleCG */ + 0x0, /* gcFEATURE_BIT_REG_MinArea */ + 0x0, /* gcFEATURE_BIT_REG_NoEZ */ + 0x0, /* gcFEATURE_BIT_REG_No422Texture */ + 0x0, /* gcFEATURE_BIT_REG_BufferInterleaving */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite2D */ + 0x0, /* gcFEATURE_BIT_REG_NoScaler */ + 0x1, /* gcFEATURE_BIT_REG_YUY2Averaging */ + 0x0, /* gcFEATURE_BIT_REG_HalfPECache */ + 0x0, /* gcFEATURE_BIT_REG_HalfTXCache */ + 0x0, /* gcFEATURE_BIT_REG_YUY2RenderTarget */ + 0x0, /* gcFEATURE_BIT_REG_Mem32BitSupport */ + 0x0, /* gcFEATURE_BIT_REG_PipeVG */ + 0x0, /* gcFEATURE_BIT_REG_VGTS */ + 0x0, /* gcFEATURE_BIT_REG_FE20 */ + 0x1, /* gcFEATURE_BIT_REG_ByteWrite3D */ + 0x1, /* gcFEATURE_BIT_REG_RsYuvTarget */ + 0x1, /* gcFEATURE_BIT_REG_FE20BitIndex */ + 0x1, /* gcFEATURE_BIT_REG_FlipY */ + 0x1, /* gcFEATURE_BIT_REG_DualReturnBus */ + 0x1, /* gcFEATURE_BIT_REG_EndiannessConfig */ + 0x1, /* gcFEATURE_BIT_REG_Texture8K */ + 0x1, /* gcFEATURE_BIT_REG_CorrectTextureConverter */ + 0x1, /* gcFEATURE_BIT_REG_SpecialMsaaLod */ + 0x1, /* gcFEATURE_BIT_REG_FastClearFlush */ + 0x1, /* gcFEATURE_BIT_REG_2DPE20 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectAutoDisable */ + 0x1, /* gcFEATURE_BIT_REG_Render8K */ + 0x1, /* gcFEATURE_BIT_REG_TileStatus2Bits */ + 0x1, /* gcFEATURE_BIT_REG_SeparateTileStatusWhenInterleaved */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiled32x32 */ + 0x0, /* gcFEATURE_BIT_REG_VG20 */ + 0x0, /* gcFEATURE_BIT_REG_TSExtendedCommands */ + 0x1, /* gcFEATURE_BIT_REG_CompressionFifoFixed */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions0 */ + 0x0, /* gcFEATURE_BIT_REG_VGFilter */ + 0x0, /* gcFEATURE_BIT_REG_VG21 */ + 0x1, /* gcFEATURE_BIT_REG_ShaderGetsW */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions1 */ + 0x1, /* gcFEATURE_BIT_REG_DefaultReg0 */ + 0x1, /* gcFEATURE_BIT_REG_MC20 */ + 0x0, /* gcFEATURE_BIT_REG_ShaderMSAASideband */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes0 */ + 0x0, /* gcFEATURE_BIT_REG_VAA */ + 0x0, /* gcFEATURE_BIT_REG_BypassInMSAA */ + 0x0, /* gcFEATURE_BIT_REG_HierarchicalZ */ + 0x0, /* gcFEATURE_BIT_REG_NewTexture */ + 0x0, /* gcFEATURE_BIT_REG_A8TargetSupport */ + 0x1, /* gcFEATURE_BIT_REG_CorrectStencil */ + 0x1, /* gcFEATURE_BIT_REG_EnhanceVR */ + 0x1, /* gcFEATURE_BIT_REG_RSUVSwizzle */ + 0x1, /* gcFEATURE_BIT_REG_V2Compression */ + 0x0, /* gcFEATURE_BIT_REG_VGDoubleBuffer */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes1 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes2 */ + 0x0, /* gcFEATURE_BIT_REG_TextureStride */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes3 */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisable1 */ + 0x0, /* gcFEATURE_BIT_REG_AutoRestartTS */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes4 */ + 0x0, /* gcFEATURE_BIT_REG_L2Windowing */ + 0x1, /* gcFEATURE_BIT_REG_HalfFloatPipe */ + 0x1, /* gcFEATURE_BIT_REG_PixelDither */ + 0x1, /* gcFEATURE_BIT_REG_TwoStencilReference */ + 0x1, /* gcFEATURE_BIT_REG_ExtendedPixelFormat */ + 0x1, /* gcFEATURE_BIT_REG_CorrectMinMaxDepth */ + 0x1, /* gcFEATURE_BIT_REG_DitherAndFilterPlusAlpha2D */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes5 */ + 0x0, /* gcFEATURE_BIT_REG_New2D */ + 0x1, /* gcFEATURE_BIT_REG_NewFloatingPointArithmetic */ + 0x1, /* gcFEATURE_BIT_REG_TextureHorizontalAlignmentSelect */ + 0x1, /* gcFEATURE_BIT_REG_NonPowerOfTwo */ + 0x1, /* gcFEATURE_BIT_REG_LinearTextureSupport */ + 0x1, /* gcFEATURE_BIT_REG_Halti0 */ + 0x0, /* gcFEATURE_BIT_REG_CorrectOverflowVG */ + 0x1, /* gcFEATURE_BIT_REG_NegativeLogFix */ + 0x1, /* gcFEATURE_BIT_REG_ResolveOffset */ + 0x1, /* gcFEATURE_BIT_REG_OkToGateAxiClock */ + 0x1, /* gcFEATURE_BIT_REG_MMU */ + 0x1, /* gcFEATURE_BIT_REG_WideLine */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes6 */ + 0x1, /* gcFEATURE_BIT_REG_FcFlushStall */ + 0x1, /* gcFEATURE_BIT_REG_LineLoop */ + 0x1, /* gcFEATURE_BIT_REG_LogicOp */ + 0x1, /* gcFEATURE_BIT_REG_SeamlessCubeMap */ + 0x1, /* gcFEATURE_BIT_REG_SuperTiledTexture */ + 0x1, /* gcFEATURE_BIT_REG_LinearPE */ + 0x1, /* gcFEATURE_BIT_REG_RectPrimitive */ + 0x0, /* gcFEATURE_BIT_REG_Composition */ + 0x1, /* gcFEATURE_BIT_REG_CorrectAutoDisableCountWidth */ + 0x1, /* gcFEATURE_BIT_REG_PESwizzle */ + 0x1, /* gcFEATURE_BIT_REG_EndEvent */ + 0x1, /* gcFEATURE_BIT_REG_S1S8 */ + 0x1, /* gcFEATURE_BIT_REG_Halti1 */ + 0x0, /* gcFEATURE_BIT_REG_RGB888 */ + 0x1, /* gcFEATURE_BIT_REG_TX_YUVAssembler */ + 0x1, /* gcFEATURE_BIT_REG_DynamicFrequencyScaling */ + 0x0, /* gcFEATURE_BIT_REG_TXFilter */ + 0x1, /* gcFEATURE_BIT_REG_FullDirectFB */ + 0x0, /* gcFEATURE_BIT_REG_OnePass2DFilter */ + 0x1, /* gcFEATURE_BIT_REG_ThreadWalkerInPS */ + 0x1, /* gcFEATURE_BIT_REG_TileFiller */ + 0x1, /* gcFEATURE_BIT_REG_YUVStandard */ + 0x0, /* gcFEATURE_BIT_REG_MultiSourceBlt */ + 0x0, /* gcFEATURE_BIT_REG_YUVConversion */ + 0x1, /* gcFEATURE_BIT_REG_FlushFixed2D */ + 0x1, /* gcFEATURE_BIT_REG_Interleaver */ + 0x1, /* gcFEATURE_BIT_REG_MixedStreams */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheFor2D420 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes7 */ + 0x0, /* gcFEATURE_BIT_REG_NoIndexPattern */ + 0x1, /* gcFEATURE_BIT_REG_TextureTileStatus */ + 0x1, /* gcFEATURE_BIT_REG_DecompressZ16 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes8 */ + 0x1, /* gcFEATURE_BIT_REG_DERotationStallFix */ + 0x0, /* gcFEATURE_BIT_REG_OclOnly */ + 0x1, /* gcFEATURE_BIT_REG_NewFeatures0 */ + 0x1, /* gcFEATURE_BIT_REG_InstructionCache */ + 0x0, /* gcFEATURE_BIT_REG_GeometryShader */ + 0x1, /* gcFEATURE_BIT_REG_TexCompressionSupertiled */ + 0x1, /* gcFEATURE_BIT_REG_Generics */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes9 */ + 0x0, /* gcFEATURE_BIT_REG_FastMSAA */ + 0x0, /* gcFEATURE_BIT_REG_WClip */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes10 */ + 0x1, /* gcFEATURE_BIT_REG_UnifiedSamplers */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes11 */ + 0x1, /* gcFEATURE_BIT_REG_PerformanceCounters */ + 0x1, /* gcFEATURE_BIT_REG_ExtraShaderInstructions2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes12 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes13 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_ACE */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_DEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes14 */ + 0x0, /* gcFEATURE_BIT_REG_PowerOptimizations0 */ + 0x1, /* gcFEATURE_BIT_REG_NewHZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes15 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements1 */ + 0x0, /* gcFEATURE_BIT_REG_DENoGamma */ + 0x0, /* gcFEATURE_BIT_REG_PAEnhancements2 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_PEEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_HIEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_FEEnhancements2 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes16 */ + 0x0, /* gcFEATURE_BIT_REG_DEEnhancements5 */ + 0x1, /* gcFEATURE_BIT_REG_TXEnhancements4 */ + 0x0, /* gcFEATURE_BIT_REG_PEEnhancements4 */ + 0x1, /* gcFEATURE_BIT_REG_MCEnhancements1 */ + 0x1, /* gcFEATURE_BIT_REG_Halti2 */ + 0x0, /* gcFEATURE_BIT_REG_DEMirrorRotate */ + 0x1, /* gcFEATURE_BIT_REG_SmallMSAA */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes17 */ + 0x0, /* gcFEATURE_BIT_REG_Rasterizer2 */ + 0x0, /* gcFEATURE_BIT_REG_DualPipeOPF */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2 */ + 0x0, /* gcFEATURE_BIT_REG_CSCV2 */ + 0x1, /* gcFEATURE_BIT_REG_PAEnhancements3 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes18 */ + 0x0, /* gcFEATURE_BIT_REG_Compression2D */ + 0x0, /* gcFEATURE_BIT_REG_Probe */ + 0x1, /* gcFEATURE_BIT_REG_MediumPrecision */ + 0x0, /* gcFEATURE_BIT_REG_DESupertile */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes19 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements6 */ + 0x1, /* gcFEATURE_BIT_REG_SHEnhancements7 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes20 */ + 0x0, /* gcFEATURE_BIT_REG_DEAddress40 */ + 0x0, /* gcFEATURE_BIT_REG_MiniMMUFix */ + 0x1, /* gcFEATURE_BIT_REG_EEZ */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes21 */ + 0x0, /* gcFEATURE_BIT_REG_ExtraVgCaps */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV15 */ + 0x1, /* gcFEATURE_BIT_REG_BugFixes22 */ + 0x1, /* gcFEATURE_BIT_REG_Halti3 */ + 0x0, /* gcFEATURE_BIT_REG_TessellationShaders */ + 0x0, /* gcFEATURE_BIT_REG_OPF9Tap */ + 0x0, /* gcFEATURE_BIT_REG_MultiSrcV2StrQuad */ + 0x0, /* gcFEATURE_BIT_REG_SeperateSRCAndDstCache */ + 0x1, /* gcFEATURE_BIT_REG_Halti4 */ + 0x1, /* gcFEATURE_BIT_REG_RAWriteDepth */ + 0x0, /* gcFEATURE_BIT_REG_AndroidOnly */ + 0x1, /* gcFEATURE_BIT_REG_HasChipProductReg */ + 0x0, /* gcFEATURE_BIT_REG_TXSupportDEC */ + 0x1, /* gcFEATURE_BIT_REG_S8MSAACompression */ + 0x1, /* gcFEATURE_BIT_REG_BugFixesIn544 */ + 0x0, /* gcFEATURE_BIT_REG_L2CacheRemove */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowRndVtxCnt */ + 0x0, /* gcFEATURE_BIT_REG_CubeMapFL28 */ + 0x1, /* gcFEATURE_BIT_REG_TX6bitFrac */ + 0x1, /* gcFEATURE_BIT_REG_FEAllowStallPrefetchEng */ + 0x0, /* gcFEATURE_BIT_REG_ThirdPartyCompression */ + 0x1, /* gcFEATURE_BIT_REG_RSS8 */ + 0x1, /* gcFEATURE_BIT_REG_MSAACoherencyCheck */ + 0x1, /* gcFEATURE_BIT_REG_Halti5 */ + 0x1, /* gcFEATURE_BIT_REG_Evis */ + 0x0, /* gcFEATURE_BIT_REG_BltEngine */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes23 */ + 0x0, /* gcFEATURE_BIT_REG_BugFixes24 */ + 0x0, /* gcFEATURE_BIT_REG_DEC */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12 */ + 0x0, /* gcFEATURE_BIT_REG_VSTileNV12_10BIT */ + 0x0, /* gcFEATURE_BIT_RenderTarget8 */ + 0x0, /* gcFEATURE_BIT_TxLodFlowCorrection */ + 0x0, /* gcFEATURE_BIT_FaceLod */ + 0x0, /* gcFEATURE_BIT_MultiCoreSemaphoreStallV2 */ + 0x1, /* gcFEATURE_BIT_VMSAA */ + 0x0, /* gcFEATURE_BIT_ChipEnableLink */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_1_5_ENHANCEMENT */ + 0x0, /* gcFEATURE_BIT_MULTI_SRC_BLT_BILINEAR_FILTER */ + 0x1, /* gcFEATURE_BIT_RA_HZEZ_CLOCK_CONTROL */ + 0x1, /* gcFEATURE_BIT_CACHE128B256BPERLINE */ + 0x1, /* gcFEATURE_BIT_V4Compression */ + 0x0, /* gcFEATURE_BIT_PE2D_MAJOR_SUPER_TILE */ + 0x1, /* gcFEATURE_BIT_PE_32BPC_COLORMASK_FIX */ + 0x1, /* gcFEATURE_BIT_ALPHA_BLENDING_OPT */ + 0x1, /* gcFEATURE_BIT_NEW_GPIPE */ + 0x0, /* gcFEATURE_BIT_PIPELINE_32_ATTRIBUTES */ + 0x0, /* gcFEATURE_BIT_MSAA_SHADING */ + 0x0, /* gcFEATURE_BIT_NO_ANISTRO_FILTER */ + 0x1, /* gcFEATURE_BIT_NO_ASTC */ + 0x0, /* gcFEATURE_BIT_NO_DXT */ + 0x0, /* gcFEATURE_BIT_HWTFB */ + 0x1, /* gcFEATURE_BIT_RA_DEPTH_WRITE_MSAA1X_FIX */ + 0x1, /* gcFEATURE_BIT_EZHZ_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_FIX */ + 0x1, /* gcFEATURE_BIT_SH_HALFDEPENDENCY_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MCFILL_FIX */ + 0x1, /* gcFEATURE_BIT_TPG_TCPERF_FIX */ + 0x1, /* gcFEATURE_BIT_USC_MDFIFO_OVERFLOW_FIX */ + 0x1, /* gcFEATURE_BIT_SH_TEXLD_BARRIER_IN_CS_FIX */ + 0x1, /* gcFEATURE_BIT_RS_NEW_BASEADDR */ + 0x1, /* gcFEATURE_BIT_PE_8bpp_DUALPIPE_FIX */ + 0x0, /* gcFEATURE_BIT_SH_ADVANCED_INSTR */ + 0x1, /* gcFEATURE_BIT_SH_FLAT_INTERPOLATION_DUAL16_FIX */ + 0x1, /* gcFEATURE_BIT_USC_CONTINUOUS_FLUS_FIX */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_V4 */ + 0x0, /* gcFEATURE_BIT_SH_SUPPORT_ALPHA_KILL */ + 0x1, /* gcFEATURE_BIT_PE_NO_ALPHA_TEST */ + 0x0, /* gcFEATURE_BIT_TX_LOD_NEAREST_SELECT */ + 0x1, /* gcFEATURE_BIT_SH_FIX_LDEXP */ + 0x1, /* gcFEATURE_BIT_SUPPORT_MOVAI */ + 0x1, /* gcFEATURE_BIT_SH_SNAP2PAGE_MAXPAGES_FIX */ + 0x1, /* gcFEATURE_BIT_PE_RGBA16I_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_8bpp_256TILE_FC_FIX */ + 0x1, /* gcFEATURE_BIT_PE_64bit_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_USC_FULL_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_TX_YUV_ASSEMBLER_10BIT */ + 0x1, /* gcFEATURE_BIT_FE_32bit_INDEX_FIX */ + 0x1, /* gcFEATURE_BIT_BLT_64bpp_MASKED_CLEAR_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY */ + 0x1, /* gcFEATURE_BIT_ROBUSTNESS */ + 0x1, /* gcFEATURE_BIT_USC_ATOMIC_FIX */ + 0x1, /* gcFEATURE_BIT_SH_PSO_MSAA1x_FIX */ + 0x1, /* gcFEATURE_BIT_USC_VX_PERF_FIX */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_ABSDIFF */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BITREPLACE */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_BOXFILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_CORDIAC */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_DP32 */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_FILTER */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_IADD */ + 0x0, /* gcFEATURE_BIT_EVIS_NO_SELECTADD */ + 0x0, /* gcFEATURE_BIT_EVIS_LERP_7OUTPUT */ + 0x0, /* gcFEATURE_BIT_EVIS_ACCSQ_8OUTPUT */ + 0x1, /* gcFEATURE_BIT_USC_GOS_ADDR_FIX */ + 0x1, /* gcFEATURE_BIT_TX_8bit_UVFrac */ + 0x1, /* gcFEATURE_BIT_TX_DESC_CACHE_CLOCKGATE_FIX */ + 0x1, /* gcFEATURE_BIT_RSBLT_MSAA_DECOMPRESSION */ + 0x0, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE */ + 0x1, /* gcFEATURE_BIT_DRAWID */ + 0x1, /* gcFEATURE_BIT_PSIO_SAMPLEMASK_IN_R0ZW_FIX */ + 0x1, /* gcFEATURE_BIT_TX_INTEGER_COORDINATE_V2 */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG */ + 0x0, /* gcFEATURE_BIT_VG_RESOLVE_ENGINE */ + 0x0, /* gcFEATURE_BIT_VG_PE_COLOR_KEY */ + 0x0, /* gcFEATURE_BIT_VG_IM_INDEX_FORMAT */ + 0x0, /* gcFEATURE_BIT_SNAPPAGE_CMD */ + 0x1, /* gcFEATURE_BIT_SH_NO_INDEX_CONST_ON_A0 */ + 0x1, /* gcFEATURE_BIT_SH_NO_ONECONST_LIMIT */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_ON_TEMP */ + 0x1, /* gcFEATURE_BIT_COMPUTE_ONLY */ + 0x1, /* gcFEATURE_BIT_SH_IMG_LDST_CLAMP */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_ALLOC_COUNT_FIX */ + 0x1, /* gcFEATURE_BIT_SH_ICACHE_PREFETCH */ + 0x0, /* gcFEATURE_BIT_PE2D_SEPARATE_CACHE */ + 0x0, /* gcFEATURE_BIT_VG_AYUV_INPUT_OUTPUT */ + 0x0, /* gcFEATURE_BIT_VG_DOUBLE_IMAGE */ + 0x0, /* gcFEATURE_BIT_VG_RECTANGLE_STRIPE_MODE */ + 0x0, /* gcFEATURE_BIT_VG_MMU */ + 0x0, /* gcFEATURE_BIT_VG_IM_FILTER */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_IM_YUV_PLANAR */ + 0x0, /* gcFEATURE_BIT_VG_PE_YUV_PACKET */ + 0x0, /* gcFEATURE_BIT_VG_COLOR_PRECISION_8_BIT */ + 0x1, /* gcFEATURE_BIT_PE_MSAA_OQ_FIX */ + 0x1, /* gcFEATURE_BIT_PSIO_MSAA_CL_FIX */ + 0x1, /* gcFEATURE_BIT_USC_DEFER_FILL_FIX */ + 0x1, /* gcFEATURE_BIT_SH_CLOCK_GATE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_NEED_DUMMYDRAW */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_OUTPUT */ + 0x0, /* gcFEATURE_BIT_PE2D_LINEAR_YUV420_10BIT */ + 0x0, /* gcFEATURE_BIT_MULTI_CLUSTER */ + 0x0, /* gcFEATURE_BIT_VG_TS_CULLING */ + 0x0, /* gcFEATURE_BIT_VG_FP25 */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK */ + 0x0, /* gcFEATURE_BIT_SH_DUAL16_SAMPLEMASK_ZW */ + 0x0, /* gcFEATURE_BIT_TPG_TRIVIAL_MODE_FIX */ + 0x0, /* gcFEATURE_BIT_TX_ASTC_MULTISLICE_FIX */ + 0x0, /* gcFEATURE_BIT_FE_ROBUST_FIX */ + 0x0, /* gcFEATURE_BIT_SH_GPIPE_ACCESS_FULLTEMPS */ + 0x0, /* gcFEATURE_BIT_PSIO_INTERLOCK */ + 0x1, /* gcFEATURE_BIT_PA_WIDELINE_FIX */ + 0x0, /* gcFEATURE_BIT_WIDELINE_HELPER_FIX */ + 0x0, /* gcFEATURE_BIT_G2D_3rd_PARTY_COMPRESSION_1_1 */ + 0x0, /* gcFEATURE_BIT_TX_FLUSH_L1CACHE */ + 0x1, /* gcFEATURE_BIT_PE_DITHER_FIX2 */ + 0x0, /* gcFEATURE_BIT_G2D_DEC400 */ + 0x0, /* gcFEATURE_BIT_SH_TEXLD_U_FIX */ + 0x0, /* gcFEATURE_BIT_MC_FCCACHE_BYTEMASK */ + 0x0, /* gcFEATURE_BIT_SH_MULTI_WG_PACK_FIX */ + 0x0, /* gcFEATURE_BIT_DC_OVERLAY_SCALING */ + 0x0, /* gcFEATURE_BIT_DC_SOURCE_ROTATION */ + 0x0, /* gcFEATURE_BIT_DC_TILED */ + 0x0, /* gcFEATURE_BIT_DC_YUV_L1 */ + 0x0, /* gcFEATURE_BIT_DC_D30_OUTPUT */ + 0x0, /* gcFEATURE_BIT_DC_MMU */ + 0x0, /* gcFEATURE_BIT_DC_COMPRESSION */ + 0x0, /* gcFEATURE_BIT_DC_QOS */ + 0x0, /* gcFEATURE_BIT_PE_ADVANCE_BLEND_PART0 */ + 0x0, /* gcFEATURE_BIT_FE_PATCHLIST_FETCH_FIX */ + 0x1, /* gcFEATURE_BIT_RA_CG_FIX */ + 0x1, /* gcFEATURE_BIT_EVIS_VX2 */ + 0x1, /* gcFEATURE_BIT_NN_FLOAT */ + 0x0, /* gcFEATURE_BIT_DEC400 */ + 0x0, /* gcFEATURE_BIT_LS_SUPPORT_PERCOMP_DEPENDENCY */ + 0x1, /* gcFEATURE_BIT_TP_ENGINE */ + 0x0, /* gcFEATURE_BIT_MULTI_CORE_BLOCK_SET_CONFIG2 */ + 0x0, /* gcFEATURE_BIT_PE_VMSAA_COVERAGE_CACHE_FIX */ + 0x1, /* gcFEATURE_BIT_SECURITY_AHB */ + 0x0, /* gcFEATURE_BIT_MULTICORE_SEMAPHORESTALL_V3 */ + 0x0, /* gcFEATURE_BIT_SMALLBATCH */ + 0x0, /* gcFEATURE_BIT_SH_CMPLX */ + 0x0, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ + 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_END_OF_BB */ + 0x1, /* gcFEATURE_BIT_VIP_V7 */ + 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ + 0x0, /* gcFEATURE_BIT_SH_IMG_LD_LASTPIXEL_FIX */ + 0x0, /* gcFEATURE_BIT_ASYNC_BLT */ + 0x0, /* gcFEATURE_BIT_ASYNC_FE_FENCE_FIX */ + 0x1, /* gcFEATURE_BIT_PSCS_THROTTLE */ + 0x0, /* gcFEATURE_BIT_SEPARATE_LS */ + 0x0, /* gcFEATURE_BIT_MCFE */ + 0x0, /* gcFEATURE_BIT_WIDELINE_TRIANGLE_EMU */ + 0x0, /* gcFEATURE_BIT_VG_RESOLUTION_8K */ + 0x0, /* gcFEATURE_BIT_FENCE_32BIT */ + 0x0, /* gcFEATURE_BIT_FENCE_64BIT */ + 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ + 0x1, /* gcFEATURE_BIT_TP_REORDER */ + 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x1, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x1, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x1, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x1, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x1, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x1, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x1, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7400_551x */ { @@ -42469,6 +47161,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -42859,6 +47552,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc8000UL_6200 */ { @@ -42897,6 +47605,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -43287,6 +47996,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* v630 */ { @@ -43325,6 +48049,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -43715,6 +48440,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6200 */ { @@ -43753,6 +48493,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -44143,6 +48884,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_6200 */ { @@ -44181,6 +48937,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -44571,6 +49328,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000LXS_6200 */ { @@ -44609,6 +49381,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -44999,6 +49772,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* vip7000_6200 */ { @@ -45037,6 +49825,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -45427,6 +50216,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000ULVX_V11_6200 */ { @@ -45465,6 +50269,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -45855,6 +50660,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000ULVX_V12_6200 */ { @@ -45893,6 +50713,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -46283,6 +51104,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000ULVX_6200_pid0x60 */ { @@ -46321,6 +51157,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -46711,6 +51548,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6FFF */ { @@ -46749,6 +51601,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -47139,6 +51992,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_6210 */ { @@ -47177,6 +52045,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -47567,6 +52436,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000_6210 */ { @@ -47605,6 +52489,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -47995,6 +52880,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6210 */ { @@ -48033,6 +52933,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -48423,6 +53324,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc8000XS_6210 */ { @@ -48461,6 +53377,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -48851,6 +53768,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XS_6210 */ { @@ -48889,6 +53821,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -49279,6 +54212,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_6210 */ { @@ -49317,6 +54265,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -49707,6 +54656,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_6210 */ { @@ -49745,6 +54709,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -50135,6 +55100,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000LXS_6210 */ { @@ -50173,6 +55153,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -50563,6 +55544,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XSVX_6210 */ { @@ -50601,6 +55597,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -50991,6 +55988,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000XSVX_6210 */ { @@ -51029,6 +56041,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -51419,6 +56432,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7000L_DEC400 */ { @@ -51457,6 +56485,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -51847,6 +56876,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7400_0002 */ { @@ -51885,6 +56929,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -52275,6 +57320,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc7400_0003 */ { @@ -52313,6 +57373,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -52703,6 +57764,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc8400_6300 */ { @@ -52741,6 +57817,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -53131,6 +58208,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc8100_6300_pid0x43 */ { @@ -53169,6 +58261,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -53559,6 +58652,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* gc8200_6300_pid0x46 */ { @@ -53597,6 +58705,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -53987,6 +59096,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x1, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* cc8000_6220 */ { @@ -54025,6 +59149,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -54415,6 +59540,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, /* cc8000_6330 */ { @@ -54453,6 +59593,7 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_VALUE_TPEngine_PwlLUTSize */ 0x0, /* gcFEATURE_VALUE_VIP_SRAM_SIZE */ 0x0, /* gcFEATURE_VALUE_TPEngine_CoreCount */ + 0x0, /* gcFEATURE_VALUE_AXI_SRAM_SIZE */ 0x1, /* gcFEATURE_BIT_REG_FastClear */ 0x0, /* gcFEATURE_BIT_REG_SpecialAntiAliasing */ 0x1, /* gcFEATURE_BIT_REG_Pipe3D */ @@ -54825,8 +59966,8 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x1, /* gcFEATURE_BIT_SH_CMPLX */ 0x1, /* gcFEATURE_BIT_SH_IDIV0_SWZL_EHS */ 0x0, /* gcFEATURE_BIT_TX_LERP_LESS_BIT */ - 0x1, /* gcFEATURE_BIT_SH_GM_ENDIAN */ - 0x1, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ + 0x0, /* gcFEATURE_BIT_SH_GM_ENDIAN */ + 0x0, /* gcFEATURE_BIT_SH_GM_USC_UNALLOC */ 0x1, /* gcFEATURE_BIT_SH_END_OF_BB */ 0x0, /* gcFEATURE_BIT_VIP_V7 */ 0x0, /* gcFEATURE_BIT_TX_BORDER_CLAMP_FIX */ @@ -54843,6 +59984,21 @@ static gcsFEATURE_DATABASE gChipInfo[] = { 0x0, /* gcFEATURE_BIT_NN_INTERLEVE8 */ 0x0, /* gcFEATURE_BIT_TP_REORDER */ 0x0, /* gcFEATURE_BIT_PE_DEPTH_ONLY_OQFIX */ + 0x0, /* gcFEATURE_BIT_TP_LRN */ + 0x1, /* gcFEATURE_BIT_TX_SEAMLESS_CUBE */ + 0x1, /* gcFEATURE_BIT_TX_SNORM_SUPPORT */ + 0x0, /* gcFEATURE_BIT_TP_MAX_POOLING_STRIDE1 */ + 0x0, /* gcFEATURE_BIT_SH_SCATTER_GATHER */ + 0x0, /* gcFEATURE_BIT_HWMANAGED_LS */ + 0x0, /* gcFEATURE_BIT_NN_FP16_ALU */ + 0x0, /* gcFEATURE_BIT_NN_INT16_ALU */ + 0x0, /* gcFEATURE_BIT_TP_ROI_POOLING */ + 0x0, /* gcFEATURE_BIT_NN_ZDP3 */ + 0x0, /* gcFEATURE_BIT_NN_ZDP6 */ + 0x0, /* gcFEATURE_BIT_NN_INT8_SCALE */ + 0x0, /* gcFEATURE_BIT_NN_POWER_ISOLATION */ + 0x0, /* gcFEATURE_BIT_SWTILING_PHASE1 */ + 0x0, /* gcFEATURE_BIT_SH_IMAGE_ENABLE_FIX */ }, }; diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h index 9b3c60ca8c7c..6cde22deb38c 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -2356,16 +2356,6 @@ gckHARDWARE_Reset( IN gckHARDWARE Hardware ); -typedef gceSTATUS (*gctISRMANAGERFUNC)(gctPOINTER Context); - -gceSTATUS -gckHARDWARE_SetIsrManager( - IN gckHARDWARE Hardware, - IN gctISRMANAGERFUNC StartIsr, - IN gctISRMANAGERFUNC StopIsr, - IN gctPOINTER Context - ); - /* Check for Hardware features. */ gceSTATUS gckHARDWARE_IsFeatureAvailable( @@ -2601,12 +2591,6 @@ gceSTATUS gckEVENT_Dump( IN gckEVENT Event ); - -gceSTATUS -gckEVENT_IsEmpty( - IN gckEVENT Event, - OUT gctBOOL_PTR IsEmpty - ); /******************************************************************************\ ******************************* gckCOMMAND Object ****************************** \******************************************************************************/ diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h index 9d24c5bd49f7..3c4897c0cd77 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h index b4f09bb2eda7..b9a812782e4d 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -235,7 +235,6 @@ typedef enum _gceHAL_COMMAND_CODES /* Wrap a user memory into a video memory node. */ gcvHAL_WRAP_USER_MEMORY, - gcvHAL_RELEASE_USER_MEMORY, /* Wait until GPU finishes access to a resource. */ gcvHAL_WAIT_FENCE, @@ -1271,12 +1270,6 @@ typedef struct _gcsHAL_INTERFACE } WrapUserMemory; - struct _gcsHAL_RELEASE_USER_MEMORY - { - IN gctUINT32 node; - } - ReleaseUserMemory; - struct _gcsHAL_WAIT_FENCE { IN gctUINT32 handle; diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver_vg.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver_vg.h index 5e41e6506410..9dc4afd00e79 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_drm.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_drm.h index cbdbb2055594..97ba6f8832f7 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_drm.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_drm.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_dump.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_dump.h index fe0d127a45bf..aad72e789137 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_dump.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_dump.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform.h index 9d261e9656fd..1dbdd4c907bb 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform_type.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform_type.h index 159460d1253a..a86708e88b72 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform_type.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_eglplatform_type.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h index 69693e6ace0c..531cb4cfe364 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine_vg.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine_vg.h index 9e3dc6c07d43..13c79c557848 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h index 92061c2d0348..ff8824b9133a 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -148,7 +148,6 @@ typedef enum _gceFEATURE gcvFEATURE_VG_FILTER, gcvFEATURE_VG21, gcvFEATURE_VG_DOUBLE_BUFFER, - gcvFEATURE_VG_RESOLUTION_8K, gcvFEATURE_MC20, gcvFEATURE_SUPER_TILED, gcvFEATURE_FAST_CLEAR_FLUSH, @@ -513,7 +512,8 @@ typedef enum _gceFEATURE gcvFEATURE_WIDELINE_TRIANGLE_EMU, gcvFEATURE_FENCE, gcvFEATURE_PE_DEPTH_ONLY_OQFIX, - + gcvFEATURE_VG_RESOLUTION_8K, + gcvFEATURE_IMAGE_LS_NO_FULLMASK_FIX, /* Insert features above this comment only. */ gcvFEATURE_COUNT /* Not a feature. */ } @@ -649,35 +649,23 @@ typedef enum _gceSURF_TYPE gcvSURF_NUM_TYPES, /* Make sure this is the last one! */ /* Combinations. */ - gcvSURF_NO_TILE_STATUS = 0x100, - gcvSURF_NO_VIDMEM = 0x200, /* Used to allocate surfaces with no underlying vidmem node. - In Android, vidmem node is allocated by another process. */ - gcvSURF_CACHEABLE = 0x400, /* Used to allocate a cacheable surface */ - - gcvSURF_TILE_RLV_FENCE = 0x800, /* create texture fence as tile */ - - gcvSURF_TILE_STATUS_DIRTY = 0x1000, /* Init tile status to all dirty */ - - gcvSURF_LINEAR = 0x2000, - - gcvSURF_CREATE_AS_TEXTURE = 0x4000, /* create it as a texture */ - - gcvSURF_PROTECTED_CONTENT = 0x8000, /* create it as content protected */ - - gcvSURF_CREATE_AS_DISPLAYBUFFER = 0x10000, /*create it as a display buffer surface */ - - gcvSURF_CONTIGUOUS = 0x20000, /*create it as contiguous */ - - /* Create it as no compression, valid on when it has tile status. */ - gcvSURF_NO_COMPRESSION = 0x40000, - - gcvSURF_DEC = 0x80000, /* Surface is DEC compressed */ - - gcvSURF_NO_HZ = 0x100000, - - gcvSURF_3D = 0x200000, /* It's 3d surface */ - - gcvSURF_CMA_LIMIT = 0x400000, + gcvSURF_NO_TILE_STATUS = 0x100, + gcvSURF_NO_VIDMEM = 0x200, /* Used to allocate surfaces with no underlying vidmem node. + In Android, vidmem node is allocated by another process. */ + gcvSURF_CACHEABLE = 0x400, /* Used to allocate a cacheable surface */ + gcvSURF_TILE_RLV_FENCE = 0x800, /* create texture fence as tile */ + gcvSURF_TILE_STATUS_DIRTY = 0x1000, /* Init tile status to all dirty */ + gcvSURF_LINEAR = 0x2000, + gcvSURF_CREATE_AS_TEXTURE = 0x4000, /* create it as a texture */ + gcvSURF_PROTECTED_CONTENT = 0x8000, /* create it as content protected */ + gcvSURF_CREATE_AS_DISPLAYBUFFER = 0x10000, /*create it as a display buffer surface */ + gcvSURF_CONTIGUOUS = 0x20000, /*create it as contiguous */ + gcvSURF_NO_COMPRESSION = 0x40000, /* Create it as no compression, valid on when it has tile status. */ + gcvSURF_DEC = 0x80000, /* Surface is DEC compressed */ + gcvSURF_NO_HZ = 0x100000, + gcvSURF_3D = 0x200000, /* It's 3d surface */ + gcvSURF_DMABUF_EXPORTABLE = 0x400000, /* master node can be exported as dma-buf fd */ + gcvSURF_CMA_LIMIT = 0x800000, gcvSURF_TEXTURE_LINEAR = gcvSURF_TEXTURE | gcvSURF_LINEAR, @@ -2115,6 +2103,8 @@ gceCOMPRESSION_OPTION; #define gcvALLOC_FLAG_SECURITY 0x00000004 /* Physical non contiguous. */ #define gcvALLOC_FLAG_NON_CONTIGUOUS 0x00000008 +/* Can be exported as dmabuf-fd */ +#define gcvALLOC_FLAG_DMABUF_EXPORTABLE 0x00000010 /* Do not try slow pools (gcvPOOL_VIRTUAL/gcvPOOL_CONTIGUOUS) */ #define gcvALLOC_FLAG_FAST_POOLS 0x00000100 diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_kernel_buffer.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_kernel_buffer.h index f22573d76cf9..2e640fdf50ed 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_kernel_buffer.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_kernel_buffer.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -112,6 +112,9 @@ typedef struct _gcsSTATE_DELTA the overflow.*/ gctUINT id; + /* The number of contexts pending modification by the delta. */ + gctINT refCount; + /* Vertex element count for the delta buffer. */ gctUINT elementCount; @@ -120,7 +123,6 @@ typedef struct _gcsSTATE_DELTA /* Record array; holds all modified states in gcsSTATE_DELTA_RECORD. */ gctUINT64 recordArray; - gctUINT recordSize; /* Map entry ID is used for map entry validation. If map entry ID does not match the main state delta ID, the entry and the corresponding state are @@ -131,6 +133,10 @@ typedef struct _gcsSTATE_DELTA /* If the map entry ID matches the main state delta ID, index points to the state record in the record array. */ gctUINT64 mapEntryIndex; + + /* Previous and next state deltas in gcsSTATE_DELTA. */ + gctUINT64 prev; + gctUINT64 next; } gcsSTATE_DELTA; diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_mem.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_mem.h index 8b3539730f7b..51a1d8ddd64d 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_mem.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_mem.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h index 61a4654b3ca5..4a11200d7fb5 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h index a811ad2e79e7..2ee13d972d6f 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -438,6 +438,8 @@ extern "C" { #define VPNC_VSSTALLCOUNT (VPNG_VS + 7) #define VPNC_VSPROCESSCOUNT (VPNG_VS + 8) #define VPNC_VSSHADERCYCLECOUNT (VPNG_VS + 9) +#define VPNC_VS_COUNT VPNC_VSSHADERCYCLECOUNT - VPNG_VS + /* HW: PS Count. */ #define VPNC_PSINSTCOUNT (VPNG_PS + 1) #define VPNC_PSBRANCHINSTCOUNT (VPNG_PS + 2) @@ -448,6 +450,7 @@ extern "C" { #define VPNC_PSSTALLCOUNT (VPNG_PS + 7) #define VPNC_PSPROCESSCOUNT (VPNG_PS + 8) #define VPNC_PSSHADERCYCLECOUNT (VPNG_PS + 9) +#define VPNC_PS_COUNT VPNC_PSSHADERCYCLECOUNT - VPNG_PS /* HW: PA Counters. */ #define VPNC_PAINVERTCOUNT (VPNG_PA + 1) @@ -463,6 +466,7 @@ extern "C" { #define VPNC_PASTARVELCOUNT (VPNG_PA + 11) #define VPNC_PASTALLCOUNT (VPNG_PA + 12) #define VPNC_PAPROCESSCOUNT (VPNG_PA + 13) +#define VPNC_PA_COUNT VPNC_PAPROCESSCOUNT - VPNG_PA /* HW: Setup Counters. */ #define VPNC_SECULLTRIANGLECOUNT (VPNG_SETUP + 1) @@ -478,6 +482,7 @@ extern "C" { #define VPNC_SENONIDLESTARVECOUNT (VPNG_SETUP + 11) #define VPNC_SETRIVIALREJLINECOUNT (VPNG_SETUP + 12) #define VPNC_SEPROCESSCOUNT (VPNG_SETUP + 13) +#define VPNC_SE_COUNT VPNC_SEPROCESSCOUNT - VPNG_SETUP /* HW: RA Counters. */ #define VPNC_RAVALIDPIXCOUNT (VPNG_RA + 1) @@ -495,6 +500,7 @@ extern "C" { #define VPNC_RASTARVELCOUNT (VPNG_RA + 13) #define VPNC_RASTALLCOUNT (VPNG_RA + 14) #define VPNC_RAPROCESSCOUNT (VPNG_RA + 15) +#define VPNC_RA_COUNT VPNC_RAPROCESSCOUNT - VPNG_RA /* HW: TEX Counters. */ #define VPNC_TXTOTBILINEARREQ (VPNG_TX + 1) @@ -505,10 +511,7 @@ extern "C" { #define VPNC_TXMC0REQCOUNT (VPNG_TX + 6) #define VPNC_TXMC1MISSCOUNT (VPNG_TX + 7) #define VPNC_TXMC1REQCOUNT (VPNG_TX + 8) -#define VPNC_TXNONIDLESTARVECOUNT (VPNG_TX + 9) -#define VPNC_TXSTARVELCOUNT (VPNG_TX + 10) -#define VPNC_TXSTALLCOUNT (VPNG_TX + 11) -#define VPNC_TXPROCESSCOUNT (VPNG_TX + 12) +#define VPNC_TX_COUNT VPNC_TXMC1REQCOUNT - VPNG_TX /* HW: PE Counters. */ #define VPNC_PE0KILLEDBYCOLOR (VPNG_PE + 1) @@ -519,6 +522,7 @@ extern "C" { #define VPNC_PE1KILLEDBYDEPTH (VPNG_PE + 6) #define VPNC_PE1DRAWNBYCOLOR (VPNG_PE + 7) #define VPNC_PE1DRAWNBYDEPTH (VPNG_PE + 8) +#define VPNC_PE_COUNT VPNC_PE1DRAWNBYDEPTH - VPNG_PE /* HW: MCC Counters. */ #define VPNC_MCCREADREQ8BCOLORPIPE (VPNG_MCC + 1) @@ -548,7 +552,7 @@ extern "C" { #define VPNC_MCCBLTWRITEBANDWIDTH (VPNG_MCC + 25) #define VPNC_MCCSH0WRITEBANDWIDTH (VPNG_MCC + 26) #define VPNC_MCCSH1WRITEBANDWIDTH (VPNG_MCC + 27) - +#define VPNC_MCC_COUNT VPNC_MCCSH1WRITEBANDWIDTH - VPNG_MCC /* HW: MCZ Counters. */ #define VPNC_MCZREADREQ8BCOLORPIPE (VPNG_MCZ + 1) @@ -569,6 +573,7 @@ extern "C" { #define VPNC_MCZAXIMAXLATENCY (VPNG_MCZ + 16) #define VPNC_MCZAXITOTALLATENCY (VPNG_MCZ + 17) #define VPNC_MCZAXISAMPLECOUNT (VPNG_MCZ + 18) +#define VPNC_MCZ_COUNT VPNC_MCZAXISAMPLECOUNT - VPNG_MCZ /* HW: HI Counters. */ #define VPNC_HI0READ8BYTE (VPNG_HI + 1) @@ -589,6 +594,7 @@ extern "C" { #define VPNC_HIIDLECYCLES (VPNG_HI + 16) #define VPNC_HIREAD8BYTE (VPNG_HI + 17) #define VPNC_HIWRITE8BYTE (VPNG_HI + 18) +#define VPNC_HI_COUNT VPNC_HIWRITE8BYTE - VPNG_HI /* HW: L2 Counters. */ #define VPNC_L2AXI0READREQCOUNT (VPNG_L2 + 1) @@ -607,6 +613,7 @@ extern "C" { #define VPNC_L2AXI1MAXLATENCY (VPNG_L2 + 14) #define VPNC_L2AXI1TOTLATENCY (VPNG_L2 + 15) #define VPNC_L2AXI1TOTREQCOUNT (VPNG_L2 + 16) +#define VPNC_L2_COUNT VPNC_L2AXI1TOTREQCOUNT - VPNG_L2 /* HW: FE Counters. */ #define VPNC_FEDRAWCOUNT (VPNG_FE + 1) @@ -616,6 +623,13 @@ extern "C" { #define VPNC_FESTALLCOUNT (VPNG_FE + 5) #define VPNC_FESTARVECOUNT (VPNG_FE + 6) #define VPNC_FEPROCESSCOUNT (VPNG_FE + 7) +#define VPNC_FE_COUNT VPNC_FEPROCESSCOUNT - VPNG_FE + +#define TOTAL_COUNTER_NUMBER (VPNC_FE_COUNT + VPNC_VS_COUNT + VPNC_PA_COUNT + VPNC_SE_COUNT + VPNC_RA_COUNT \ + + VPNC_PS_COUNT + VPNC_TX_COUNT + VPNC_PE_COUNT + VPNC_MCC_COUNT + VPNC_MCZ_COUNT \ + + VPNC_HI_COUNT + VPNC_L2_COUNT) + +#define TOTAL_MODULE_NUMBER 12 /* PROGRAM: Shader program counters. */ #define VPC_PVSINSTRCOUNT (VPG_PVS + PVS_INSTRCOUNT) @@ -702,6 +716,29 @@ extern "C" { gcmWRITE_CONST(Counter); \ gcmWRITE_VALUE(Value) +/* Write a data value. */ +#define gcmRECORD_VALUE(IntData) \ + do \ + { \ + gctINT32 value = IntData; \ + value = BIG_ENDIAN_TRANS_INT(value); \ + counterData[counterIndex++] = value; \ + } \ + while (gcvFALSE) + +#define gcmRECORD_CONST(Const) \ + do \ + { \ + gctINT32 data = Const; \ + data = BIG_ENDIAN_TRANS_INT(data); \ + counterData[counterIndex++] = data; \ + } \ + while (gcvFALSE) + +#define gcmRECORD_COUNTER(Counter, Value) \ + gcmRECORD_CONST(Counter); \ + gcmRECORD_VALUE(Value) + /* Write a string value (char*). */ #define gcmWRITE_STRING(String) \ do \ @@ -998,7 +1035,8 @@ typedef struct _gcsPROFILER_COUNTERS } gcsPROFILER_COUNTERS; -#define NumOfDrawBuf 128 +#define NumOfPerFrameBuf 16 +#define NumOfPerDrawBuf 128 typedef enum _gceCOUNTER_OPTYPE { @@ -1012,15 +1050,24 @@ typedef enum _gceCOUNTER_OPTYPE } gceCOUNTER_OPTYPE; -typedef struct _gcsCounterBuffer +typedef struct gcsCounterBuffer * gcsCounterBuffer_PTR; + +struct gcsCounterBuffer { gcsPROFILER_COUNTERS *counters; gctHANDLE couterBufobj; gctUINT32 probeAddress; + gctPOINTER logicalAddress; gceCOUNTER_OPTYPE opType; gctUINT32 opID; -} -gcsCounterBuffer; + gctUINT32 startPos; + gctUINT32 endPos; + gctUINT32 dataSize; + gctBOOL available; + gctBOOL needDump; + gcsCounterBuffer_PTR next; + gcsCounterBuffer_PTR prev; +}; typedef struct _gcoPROFILER * gcoPROFILER; @@ -1034,16 +1081,21 @@ struct _gcoPROFILER gctFILE file; gctCHAR* fileName; - gcsCounterBuffer counterBuf[NumOfDrawBuf]; - gcsPROFILER_COUNTERS *preCounters; - gctINT32 curBufId; + gcsCounterBuffer_PTR counterBuf; + gctUINT32 bufferCount; gctBOOL perDrawMode; gctBOOL needDump; gctBOOL counterEnable; gceProfilerClient profilerClient; + + /*query some features from hw*/ gctUINT32 coreCount; + gctUINT32 shaderCoreCount; + gctBOOL bHalti4; + gctBOOL psRenderPixelFix; + gctBOOL axiBus128bits; }; typedef enum _gceProbeStatus diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h index 0ade94abcf68..a2bdb8f0c451 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_rename.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_rename.h index a7b394d7b293..24c260f24cca 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_rename.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_rename.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_resource.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_resource.h index 90d82b223b68..e8ff2a7b4254 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_resource.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_resource.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_security_interface.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_security_interface.h index be08c9c2f714..db76826ba637 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_security_interface.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_security_interface.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_statistics.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_statistics.h index 5a33b01f5d3b..2c48772ad1b1 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_statistics.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_statistics.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h index 600f039099e4..f2d3d2ae7ba9 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h index c83b7fe30cd8..2792b36ae4bb 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -62,8 +62,8 @@ #define gcvVERSION_PATCH 4 -#define gcvVERSION_BUILD 138003 +#define gcvVERSION_BUILD 148482 -#define gcvVERSION_STRING "6.2.4.138003" +#define gcvVERSION_STRING "6.2.4.p1.148482" #endif /* __gc_hal_version_h_ */ diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_vg.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_vg.h index aa6ad711e1e9..f821f96f1cd0 100644 --- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_vg.h +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_vg.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h index e78bf20b6dfa..8abb7e52f5ce 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c index a412237faa99..17c6dd61ee42 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -162,21 +162,13 @@ _DmaAlloc( struct mdl_dma_priv *mdlPriv=gcvNULL; gckOS os = Allocator->os; -#if defined CONFIG_ARM64 - struct device *dev = _GetDevice(os); -#endif - gcmkHEADER_ARG("Mdl=%p NumPages=0x%zx Flags=0x%x", Mdl, NumPages, Flags); -#if defined CONFIG_ARM64 - gcmkVERIFY_ARGUMENT(dev); -#endif - gcmkONERROR(gckOS_Allocate(os, sizeof(struct mdl_dma_priv), (gctPOINTER *)&mdlPriv)); mdlPriv->kvaddr #if defined CONFIG_ARM64 - = dma_alloc_coherent(dev, NumPages * PAGE_SIZE, &mdlPriv->dmaHandle, GFP_KERNEL | gcdNOWARN); + = dma_alloc_coherent(_GetDevice(os), NumPages * PAGE_SIZE, &mdlPriv->dmaHandle, GFP_KERNEL | gcdNOWARN); #elif defined CONFIG_MIPS || defined CONFIG_CPU_CSKYV2 || defined CONFIG_PPC = dma_alloc_coherent(gcvNULL, NumPages * PAGE_SIZE, &mdlPriv->dmaHandle, GFP_KERNEL | gcdNOWARN); #else @@ -251,7 +243,12 @@ _DmaGetSGT( gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); } - page = virt_to_page(mdlPriv->kvaddr); +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) + page = phys_to_page (mdlPriv->dmaHandle); +#else + page = phys_to_page(dma_to_phys(&Allocator->os->device->platform->device->dev, mdlPriv->dmaHandle)); +#endif + for (i = 0; i < numPages; ++i) { pages[i] = nth_page(page, i + skipPages); @@ -581,7 +578,7 @@ _DmaAlloctorInit( * DMA allocator is only used for NonPaged memory * when NO_DMA_COHERENT is not defined. */ - allocator->capability = 0; + allocator->capability = gcvALLOC_FLAG_DMABUF_EXPORTABLE; *Allocator = allocator; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dmabuf.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dmabuf.c index 9459f7988960..df85a09a607a 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dmabuf.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dmabuf.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -289,7 +289,7 @@ OnError: gcmkOS_SAFE_FREE(os, pagearray); } - if(sgt) + if (sgt) { dma_buf_unmap_attachment(attachment, sgt, DMA_BIDIRECTIONAL); } @@ -497,7 +497,9 @@ _DmabufAlloctorInit( gcmkONERROR( gckALLOCATOR_Construct(Os, &DmabufAllocatorOperations, &allocator)); - allocator->capability = gcvALLOC_FLAG_DMABUF; + allocator->capability = gcvALLOC_FLAG_DMABUF + | gcvALLOC_FLAG_DMABUF_EXPORTABLE + ; /* Register private data. */ allocator->privateData = priv; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c index 2949e0b0c8b2..352c08f1d5fa 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -985,6 +985,7 @@ _GFPAlloctorInit( | gcvALLOC_FLAG_CACHEABLE | gcvALLOC_FLAG_MEMLIMIT | gcvALLOC_FLAG_ALLOC_ON_FAULT + | gcvALLOC_FLAG_DMABUF_EXPORTABLE ; #if defined(gcdEMULATE_SECURE_ALLOCATOR) diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c index 3c0e7cb15767..565eb66b9e4b 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c index 26a81b678c13..9491ea72c7ac 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h index 12bdd6ef9235..f5c27ce2bb78 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c index c8bfb12eda31..6e787c9d3e87 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -220,7 +220,12 @@ _CMAFSLGetSGT( gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY); } - page = virt_to_page(mdl_priv->kvaddr); +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) + page = phys_to_page (mdlPriv->physical); +#else + page = phys_to_page(dma_to_phys(&Allocator->os->device->platform->device->dev, mdl_priv->physical)); +#endif + for (i = 0; i < numPages; ++i) { pages[i] = nth_page(page, i + skipPages); @@ -552,7 +557,9 @@ _CMAFSLAlloctorInit( _CMAAllocatorDebugfsInit(allocator, Parent); - allocator->capability = gcvALLOC_FLAG_CONTIGUOUS; + allocator->capability = gcvALLOC_FLAG_CONTIGUOUS + | gcvALLOC_FLAG_DMABUF_EXPORTABLE + ; #if defined(CONFIG_ARM64) Os->allocatorLimitMarker = (Os->device->baseAddress + totalram_pages * PAGE_SIZE) > 0x100000000; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c index 160a7f85970f..85b52d587302 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.h index a854d6e20a99..30690f9d4cd6 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.h index 5cf45d5ef5eb..a3428a1667b8 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -106,13 +106,14 @@ typedef va_list gctARGUMENTS; #endif #define gcmkOUTPUT_STRING(String) \ - if(gckDEBUGFS_IsEnabled()) {\ - while(-ERESTARTSYS == gckDEBUGFS_Print(String));\ - }else{\ + if (gckDEBUGFS_IsEnabled()) \ + { \ + while (-ERESTARTSYS == gckDEBUGFS_Print(String)); \ + } \ + else \ + { \ printk(String); \ - }\ - touch_softlockup_watchdog() - + } #define gcmkSPRINTF(Destination, Size, Message, Value) \ snprintf(Destination, Size, Message, Value) diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.c index 622df619a60f..1bb68fcd6c88 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.h index 1165b3163495..14a3324442a9 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debugfs.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c index f2138cfc93f6..020cba99df7a 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -54,6 +54,7 @@ #include "gc_hal_kernel_linux.h" +#include "gc_hal_kernel_allocator.h" #include <linux/pagemap.h> #include <linux/seq_file.h> #include <linux/mman.h> @@ -66,10 +67,6 @@ #define gcdDEBUG_FS_WARN "Experimental debug entry, may be removed in future release, do NOT rely on it!\n" -#ifdef FLAREON - static struct dove_gpio_irq_handler gc500_handle; -#endif - static gckGALDEVICE galDevice; extern gcTA globalTA[16]; @@ -856,6 +853,8 @@ _SetupVidMem( if (gcmIS_SUCCESS(status)) { + gckALLOCATOR allocator = ((PLINUX_MDL)device->contiguousPhysical)->allocator; + device->contiguousVidMem->capability = allocator->capability | gcvALLOC_FLAG_MEMLIMIT; device->contiguousVidMem->physical = device->contiguousPhysical; device->contiguousBase = physAddr; break; @@ -900,6 +899,8 @@ _SetupVidMem( } else { + gckALLOCATOR allocator; + gcmkONERROR(gckOS_RequestReservedMemory( device->os, ContiguousBase, ContiguousSize, "galcore contiguous memory", @@ -907,6 +908,8 @@ _SetupVidMem( &device->contiguousPhysical )); + allocator = ((PLINUX_MDL)device->contiguousPhysical)->allocator; + device->contiguousVidMem->capability = allocator->capability | gcvALLOC_FLAG_MEMLIMIT; device->contiguousVidMem->physical = device->contiguousPhysical; device->requestedContiguousBase = ContiguousBase; device->requestedContiguousSize = ContiguousSize; @@ -955,17 +958,16 @@ static irqreturn_t isrRoutine(int irq, void *ctxt) { gceSTATUS status; gckGALDEVICE device; - gceCORE Core = (gceCORE) gcmPTR2INT32(ctxt); + gceCORE core = (gceCORE)gcmPTR2INT32(ctxt) - 1; device = galDevice; /* Call kernel interrupt notification. */ - status = gckKERNEL_Notify(device->kernels[Core], gcvNOTIFY_INTERRUPT, gcvTRUE); + status = gckKERNEL_Notify(device->kernels[core], gcvNOTIFY_INTERRUPT, gcvTRUE); if (gcmIS_SUCCESS(status)) { - up(&device->semas[Core]); - + up(&device->semas[core]); return IRQ_HANDLED; } @@ -1327,14 +1329,6 @@ gckGALDEVICE_Construct( gcmkONERROR(gckDEVICE_AddCore(device->device, gcvCORE_MAJOR, Args->chipIDs[gcvCORE_MAJOR], device, &device->kernels[gcvCORE_MAJOR])); - /* Setup the ISR manager. */ - gcmkONERROR(gckHARDWARE_SetIsrManager( - device->kernels[gcvCORE_MAJOR]->hardware, - (gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR, - (gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR, - (gctPOINTER)gcvCORE_MAJOR - )); - gcmkONERROR(gckHARDWARE_SetFastClear( device->kernels[gcvCORE_MAJOR]->hardware, FastClear, Compression )); @@ -1377,14 +1371,6 @@ gckGALDEVICE_Construct( gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT); } - /* Setup the ISR manager. */ - gcmkONERROR(gckHARDWARE_SetIsrManager( - device->kernels[gcvCORE_2D]->hardware, - (gctISRMANAGERFUNC) gckGALDEVICE_Setup_ISR, - (gctISRMANAGERFUNC) gckGALDEVICE_Release_ISR, - (gctPOINTER)gcvCORE_2D - )); - gcmkONERROR(gckHARDWARE_SetPowerManagement( device->kernels[gcvCORE_2D]->hardware, PowerManagement )); @@ -1417,7 +1403,7 @@ gckGALDEVICE_Construct( } /* Add core for multiple core. */ - for (i = gcvCORE_3D1; i <= gcvCORE_3D3; i++) + for (i = gcvCORE_3D1; i <= gcvCORE_3D_MAX; i++) { if (Args->irqs[i] != -1) { @@ -1777,6 +1763,23 @@ gckGALDEVICE_Destroy( return gcvSTATUS_OK; } +static const char *isrNames[] = +{ + "galcore:0", + "galcore:3d-1", + "galcore:3d-2", + "galcore:3d-3", + "galcore:3d-4", + "galcore:3d-5", + "galcore:3d-6", + "galcore:3d-7", + "galcore:2d", + "galcore:vg", +#if gcdDEC_ENABLE_AHB + "galcore:dec" +#endif +}; + /******************************************************************************* ** ** gckGALDEVICE_Setup_ISR @@ -1817,21 +1820,17 @@ gckGALDEVICE_Setup_ISR( gcmkONERROR(gcvSTATUS_GENERIC_IO); } +#if defined(__GNUC__) && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 6) || (__GNUC__ > 4)) + { + _Static_assert(gcvCORE_COUNT == gcmCOUNTOF(isrNames), + "Core count is lager than isrNames size"); + } +#endif + /* Hook up the isr based on the irq line. */ -#ifdef FLAREON - gc500_handle.dev_name = "galcore interrupt service"; - gc500_handle.dev_id = Device; - gc500_handle.handler = isrRoutine; - gc500_handle.intr_gen = GPIO_INTR_LEVEL_TRIGGER; - gc500_handle.intr_trig = GPIO_TRIG_HIGH_LEVEL; - - ret = dove_gpio_request( - DOVE_GPIO0_7, &gc500_handle - ); -#else ret = request_irq( Device->irqLines[Core], isrRoutine, gcdIRQF_FLAG, - "galcore interrupt service", (gctPOINTER)Core + isrNames[Core], (void *)(uintptr_t)(Core + 1) ); if (ret != 0) @@ -1848,7 +1847,6 @@ gckGALDEVICE_Setup_ISR( /* Mark ISR as initialized. */ Device->isrInitializeds[Core] = gcvTRUE; -#endif gcmkFOOTER_NO(); return gcvSTATUS_OK; @@ -1876,22 +1874,10 @@ gckGALDEVICE_Setup_ISR_VG( } /* Hook up the isr based on the irq line. */ -#ifdef FLAREON - gc500_handle.dev_name = "galcore interrupt service"; - gc500_handle.dev_id = Device; - gc500_handle.handler = isrRoutineVG; - gc500_handle.intr_gen = GPIO_INTR_LEVEL_TRIGGER; - gc500_handle.intr_trig = GPIO_TRIG_HIGH_LEVEL; - - ret = dove_gpio_request( - DOVE_GPIO0_7, &gc500_handle - ); -#else ret = request_irq( Device->irqLines[gcvCORE_VG], isrRoutineVG, gcdIRQF_FLAG, - "galcore interrupt service for 2D", Device + isrNames[gcvCORE_VG], Device ); -#endif if (ret != 0) { @@ -1948,11 +1934,7 @@ gckGALDEVICE_Release_ISR( /* release the irq */ if (Device->isrInitializeds[Core]) { -#ifdef FLAREON - dove_gpio_free(DOVE_GPIO0_7, "galcore interrupt service"); -#else - free_irq(Device->irqLines[Core], (gctPOINTER)Core); -#endif + free_irq(Device->irqLines[Core], (void *)(uintptr_t)(Core + 1)); Device->isrInitializeds[Core] = gcvFALSE; } @@ -1972,12 +1954,7 @@ gckGALDEVICE_Release_ISR_VG( /* release the irq */ if (Device->isrInitializeds[gcvCORE_VG]) { -#ifdef FLAREON - dove_gpio_free(DOVE_GPIO0_7, "galcore interrupt service"); -#else free_irq(Device->irqLines[gcvCORE_VG], Device); -#endif - Device->isrInitializeds[gcvCORE_VG] = gcvFALSE; } @@ -2013,6 +1990,7 @@ gckGALDEVICE_Start_Threads( ) { gceSTATUS status; + gctUINT i; gcmkHEADER_ARG("Device=0x%x", Device); @@ -2023,13 +2001,9 @@ gckGALDEVICE_Start_Threads( gcmkONERROR(_StartThread(threadRoutine, gcvCORE_VG)); + for (i = gcvCORE_3D1; i <= gcvCORE_3D_MAX; i++) { - gctUINTPTR_T i = gcvCORE_3D1; - - for (; i <= gcvCORE_3D3; i++) - { - gcmkONERROR(_StartThread(threadRoutine, i)); - } + gcmkONERROR(_StartThread(threadRoutine, i)); } gcmkFOOTER_NO(); diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h index aab2712b2cd8..185485cf310b 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c index b96e26068ef6..b7017382b313 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -56,6 +56,7 @@ #include <linux/device.h> #include <linux/slab.h> #include <linux/miscdevice.h> +#include <linux/uaccess.h> #include "gc_hal_kernel_linux.h" #include "gc_hal_driver.h" @@ -1111,23 +1112,18 @@ static int gpu_resume(struct platform_device *dev) { return -1; } + /* Convert global state to crossponding internal state. */ switch(device->statesStored[i]) { case gcvPOWER_OFF: statesStored = gcvPOWER_OFF_BROADCAST; - if(device->kernels[i]->hardware) - device->kernels[i]->hardware->forcePowerOff = gcvTRUE; break; case gcvPOWER_IDLE: statesStored = gcvPOWER_IDLE_BROADCAST; - if(device->kernels[i]->hardware) - device->kernels[i]->hardware->forcePowerOff = gcvTRUE; break; case gcvPOWER_SUSPEND: statesStored = gcvPOWER_SUSPEND_BROADCAST; - if(device->kernels[i]->hardware) - device->kernels[i]->hardware->forcePowerOff = gcvTRUE; break; case gcvPOWER_ON: statesStored = gcvPOWER_ON_AUTO; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c index c194ee30f374..b4846cb65bb8 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -165,7 +165,7 @@ static int viv_ioctl_gem_create(struct drm_device *drm, void *data, gckKERNEL kernel; gctUINT32 processID; gckVIDMEM_NODE nodeObject; - gctUINT32 flags = 0; + gctUINT32 flags = gcvALLOC_FLAG_DMABUF_EXPORTABLE; gceSTATUS status = gcvSTATUS_OK; gal_dev = (gckGALDEVICE)drm->dev_private; @@ -187,9 +187,9 @@ static int viv_ioctl_gem_create(struct drm_device *drm, void *data, flags |= gcvALLOC_FLAG_SECURITY; } if (args->flags & DRM_VIV_GEM_CMA_LIMIT) - { + { flags |= gcvALLOC_FLAG_CMA_LIMIT; - } + } gckOS_ZeroMemory(&iface, sizeof(iface)); iface.command = gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c index f2961e7dbd53..f36e11682f91 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.c index 02a71859185b..bcda2c161874 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.h index df78aad26ae3..f1ae2b196354 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_linux.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -63,10 +63,6 @@ #include <linux/mm.h> #include <linux/sched.h> #include <linux/signal.h> -#ifdef FLAREON -#error 1 -# include <asm/arch-realview/dove_gpio_irq.h> -#endif #include <linux/interrupt.h> #include <linux/vmalloc.h> #include <linux/dma-mapping.h> @@ -230,7 +226,7 @@ struct _gckOS gctBOOL allocatorLimitMarker; /* Lock for register access check. */ - struct mutex registerAccessLocks[gcdMAX_GPU_COUNT]; + spinlock_t registerAccessLock; /* External power states. */ gctBOOL powerStates[gcdMAX_GPU_COUNT]; diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_math.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_math.c index 9ac7a3b4959d..f373f47a41e0 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_math.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_math.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_mutex.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_mutex.h index 72be2e933059..d2c94e2254ad 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_mutex.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_mutex.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c index 2ae5f21e5213..c6a5d24cc803 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -169,7 +169,7 @@ FindMdlMap( IN gctINT ProcessID ) { - PLINUX_MDL_MAP mdlMap; + PLINUX_MDL_MAP mdlMap; gcmkHEADER_ARG("Mdl=0x%X ProcessID=%d", Mdl, ProcessID); @@ -242,6 +242,13 @@ _DestroyMdl( allocator->ops->Free(allocator, Mdl); } + mutex_lock(&Mdl->mapsMutex); + list_for_each_entry_safe(mdlMap, next, &Mdl->mapsHead, link) + { + gcmkVERIFY_OK(_DestroyMdlMap(Mdl, mdlMap)); + } + mutex_unlock(&Mdl->mapsMutex); + if (Mdl->link.next) { /* Remove the node from global list.. */ @@ -250,11 +257,6 @@ _DestroyMdl( mutex_unlock(&os->mdlMutex); } - list_for_each_entry_safe(mdlMap, next, &Mdl->mapsHead, link) - { - gcmkVERIFY_OK(_DestroyMdlMap(Mdl, mdlMap)); - } - kfree(Mdl); } @@ -560,38 +562,6 @@ OnError: } #endif -static inline gceSTATUS -_AllowAccess( - IN gckOS Os, - IN gceCORE Core, - IN gctUINT32 Address - ) -{ - gctUINT32 data; - - /* Check external clock state. */ - if (Os->clockStates[Core] == gcvFALSE) - { - gcmkPRINT("[galcore]: %s(%d) GPU[%d] External clock off", __FUNCTION__, __LINE__, Core); - return gcvSTATUS_NOT_SUPPORTED; - } - - /* Check internal clock state. */ - if (Address == 0) - { - return gcvSTATUS_OK; - } - - data = readl((gctUINT8 *)Os->device->registerBases[Core] + 0x0); - - if ((data & 0x3) == 0x3) - { - gcmkPRINT("[galcore]: %s(%d) GPU[%d] Internal clock off", __FUNCTION__, __LINE__, Core); - return gcvSTATUS_NOT_SUPPORTED; - } - - return gcvSTATUS_OK; -} static gceSTATUS _ShrinkMemory( @@ -644,7 +614,6 @@ gckOS_Construct( { gckOS os; gceSTATUS status; - gctINT i; gcmkHEADER_ARG("Context=0x%X", Context); @@ -714,10 +683,7 @@ gckOS_Construct( SetPageReserved(os->paddingPage); } - for (i = 0; i < gcdMAX_GPU_COUNT; i++) - { - mutex_init(&os->registerAccessLocks[i]); - } + spin_lock_init(&os->registerAccessLock); gckOS_ImportAllocators(os); @@ -1426,7 +1392,6 @@ gckOS_AllocateNonPagedMemory( if (Os->allocatorLimitMarker) { flag |= gcvALLOC_FLAG_CMA_LIMIT; - flag |= gcvALLOC_FLAG_CMA_PREEMPT; } /* Walk all allocators. */ @@ -1719,28 +1684,32 @@ gckOS_ReadRegisterEx( OUT gctUINT32 * Data ) { - gcmkHEADER_ARG("Os=0x%X Core=%d Address=0x%X", Os, Core, Address); + unsigned long flags; - /* Verify the arguments. */ - gcmkVERIFY_OBJECT(Os, gcvOBJ_OS); + spin_lock_irqsave(&Os->registerAccessLock, flags); - gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]); + if (unlikely(Os->clockStates[Core] == gcvFALSE)) + { + spin_unlock_irqrestore(&Os->registerAccessLock, flags); - gcmkVERIFY_ARGUMENT(Data != gcvNULL); + /* + * Read register when power off: + * 1. In shared IRQ, read register may be called and that's not our irq. + * 2. In non-irq context, register access should not be called, + * otherwise it's driver bug. + */ + if (!in_irq()) + { + gcmkPRINT("[galcore]: %s(%d) GPU[%d] external clock off", + __func__, __LINE__, Core); + gcmkBUG_ON(1); + } - if (!in_irq()) - { - mutex_lock(&Os->registerAccessLocks[Core]); + return gcvSTATUS_GENERIC_IO; } - gcmkBUG_ON(gcvSTATUS_OK != _AllowAccess(Os, Core, Address)); - *Data = readl((gctUINT8 *)Os->device->registerBases[Core] + Address); - - if (!in_irq()) - { - mutex_unlock(&Os->registerAccessLocks[Core]); - } + spin_unlock_irqrestore(&Os->registerAccessLock, flags); #if gcdDUMP_AHB_ACCESS if (!in_irq()) @@ -1751,7 +1720,6 @@ gckOS_ReadRegisterEx( #endif /* Success. */ - gcmkFOOTER_ARG("*Data=0x%08x", *Data); return gcvSTATUS_OK; } @@ -1794,26 +1762,27 @@ gckOS_WriteRegisterEx( IN gctUINT32 Data ) { - gcmkHEADER_ARG("Os=0x%X Core=%d Address=0x%X Data=0x%08x", Os, Core, Address, Data); + unsigned long flags; - gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]); + spin_lock_irqsave(&Os->registerAccessLock, flags); - if (!in_interrupt()) + if (unlikely(Os->clockStates[Core] == gcvFALSE)) { - mutex_lock(&Os->registerAccessLocks[Core]); - } + spin_unlock_irqrestore(&Os->registerAccessLock, flags); - gcmkBUG_ON(gcvSTATUS_OK != _AllowAccess(Os, Core, Address)); - - writel(Data, (gctUINT8 *)Os->device->registerBases[Core] + Address); + gcmkPRINT("[galcore]: %s(%d) GPU[%d] external clock off", + __func__, __LINE__, Core); - if (!in_interrupt()) - { - mutex_unlock(&Os->registerAccessLocks[Core]); + /* Driver bug: register write when clock off. */ + gcmkBUG_ON(1); + return gcvSTATUS_GENERIC_IO; } + writel(Data, (gctUINT8 *)Os->device->registerBases[Core] + Address); + spin_unlock_irqrestore(&Os->registerAccessLock, flags); + #if gcdDUMP_AHB_ACCESS - if (!in_interrupt()) + if (!in_irq()) { /* Dangerous to print in interrupt context, skip. */ gcmkPRINT("@[WR %d] %08x %08x", Core, Address, Data); @@ -1821,7 +1790,6 @@ gckOS_WriteRegisterEx( #endif /* Success. */ - gcmkFOOTER_NO(); return gcvSTATUS_OK; } @@ -5417,6 +5385,18 @@ gckOS_SetGPUPower( clockChange = (Clock != Os->clockStates[Core]); + if (clockChange) + { + unsigned long flags; + + spin_lock_irqsave(&Os->registerAccessLock, flags); + + /* Record clock states, ahead. */ + Os->clockStates[Core] = Clock; + + spin_unlock_irqrestore(&Os->registerAccessLock, flags); + } + if (powerChange && (Power == gcvTRUE)) { if (platform && platform->ops->setPower) @@ -5429,16 +5409,10 @@ gckOS_SetGPUPower( if (clockChange) { - mutex_lock(&Os->registerAccessLocks[Core]); - if (platform && platform->ops->setClock) { gcmkVERIFY_OK(platform->ops->setClock(platform, Core, Clock)); } - - Os->clockStates[Core] = Clock; - - mutex_unlock(&Os->registerAccessLocks[Core]); } if (powerChange && (Power == gcvFALSE)) diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.h index f1c39a0f5ecc..57cd01a1354b 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_platform.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_platform.h index e7feddadd515..b790b90df082 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_platform.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_platform.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel.c index 64b278fce09c..d0969ff24661 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel_emulator.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel_emulator.c index 533125fa7728..c0b17ceead52 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel_emulator.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_security_channel_emulator.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c index 0d56683c39c9..95f3e460e648 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h index 72c6423f7306..9fe50429b164 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c index 882cd75bf600..1f522b6ced68 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6.c index 43e308de7b75..3e0d26b053c8 100644 --- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6.c +++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6.c @@ -1,54 +1,12 @@ /**************************************************************************** * -* The MIT License (MIT) +* Copyright (c) 2005 - 2018 by Vivante Corp. All rights reserved. * -* Copyright (c) 2014 - 2017 Vivante Corporation -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -* DEALINGS IN THE SOFTWARE. -* -***************************************************************************** -* -* The GPL License (GPL) -* -* Copyright (C) 2014 - 2017 Vivante Corporation -* -* This program is free software; you can redistribute it and/or -* modify it under the terms of the GNU General Public License -* as published by the Free Software Foundation; either version 2 -* of the License, or (at your option) any later version. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -* -* You should have received a copy of the GNU General Public License -* along with this program; if not, write to the Free Software Foundation, -* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -* -***************************************************************************** -* -* Note: This software is released under dual MIT and GPL licenses. A -* recipient may use this file under the terms of either the MIT license or -* GPL License. If you wish to use only one license not the other, you can -* indicate your decision by deleting one of the above license notices in your -* version of this file. +* The material in this file is confidential and contains trade secrets +* of Vivante Corporation. This is proprietary information owned by +* Vivante Corporation. No part of this work may be disclosed, +* reproduced, copied, transmitted, or used in any way for any purpose, +* without the express written permission of Vivante Corporation. * *****************************************************************************/ @@ -423,8 +381,8 @@ static struct imx_priv imxPriv; static ssize_t show_gpuMode(struct device_driver *dev, char *buf) { struct imx_priv *priv = &imxPriv; - char buffer[512] = {0}; - char mode[16] = {0}; + char buffer[512]; + char mode[16]; int i; unsigned long core_freq = 0; @@ -607,6 +565,7 @@ int remove_gpu_opp_table(void) #endif #ifdef IMX_GPU_SUBSYSTEM + static int use_imx_gpu_subsystem; /* sub device component ops. */ @@ -628,7 +587,7 @@ static const struct component_ops mxc_gpu_sub_ops = }; /* sub device driver. */ -static const struct of_device_id gpu_sub_match[] = +static const struct of_device_id mxc_gpu_sub_match[] = { { .compatible = "fsl,imx8-gpu"}, { /* sentinel */ } @@ -650,111 +609,109 @@ struct platform_driver mxc_gpu_sub_driver = .driver = { .name = "mxc-gpu", .owner = THIS_MODULE, - .of_match_table = gpu_sub_match, + .of_match_table = mxc_gpu_sub_match, }, .probe = mxc_gpu_sub_probe, .remove = mxc_gpu_sub_remove, }; -static int register_imx_gpu_sub_driver(void) +static int register_mxc_gpu_sub_driver(void) { - if (use_imx_gpu_subsystem) - return platform_driver_register(&mxc_gpu_sub_driver); - - return 0; + return use_imx_gpu_subsystem ? platform_driver_register(&mxc_gpu_sub_driver) : 0; } -static void unregister_imx_gpu_sub_driver(void) +static void unregister_mxc_gpu_sub_driver(void) { - if (use_imx_gpu_subsystem) + if (use_imx_gpu_subsystem) { platform_driver_unregister(&mxc_gpu_sub_driver); + } } -/* master device component ops. */ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) -static int (* gpu_probe_real)(struct platform_device *pdev); -static int (* gpu_remove_real)(struct platform_device *pdev); -#else -static int __devinit (* gpu_probe_real)(struct platform_device *pdev); -static int __devexit (* gpu_remove_real)(struct platform_device *pdev); -#endif - -static int mxc_gpu_master_bind(struct device *dev) +static int patch_param_imx8_subsystem(struct platform_device *pdev, + gcsMODULE_PARAMETERS *args) { - int ret; + int i = 0; + struct resource* res; + struct device_node *node = pdev->dev.of_node; + struct device_node *core_node; + int core = gcvCORE_MAJOR; - ret = component_bind_all(dev, 0); - if (ret < 0) - return ret; + while ((core_node = of_parse_phandle(node, "cores", i++)) != NULL) { + struct platform_device *pdev_gpu; + int irqLine = -1; - /* Call real probe. */ - ret = gpu_probe_real(to_platform_device(dev)); - if (!ret) - return 0; + if (!of_device_is_available(core_node)) { + of_node_put(core_node); + continue; + } - /* error. */ - component_unbind_all(dev, 0); - return ret; -} + pdev_gpu = of_find_device_by_node(core_node); -static void mxc_gpu_master_unbind(struct device *dev) -{ - /* Call real remove. */ - gpu_remove_real(to_platform_device(dev)); - component_unbind_all(dev, 0); -} + if (!pdev_gpu) + break; -static const struct component_master_ops mxc_gpu_master_ops = -{ - .bind = mxc_gpu_master_bind, - .unbind = mxc_gpu_master_unbind, -}; + irqLine = platform_get_irq(pdev_gpu, 0); -static int compare_dev(struct device *dev, void *data) -{ - struct device_node *np = data; + if (irqLine < 0) + break; - return dev->of_node == np; -} + res = platform_get_resource(pdev_gpu, IORESOURCE_MEM, 0); -/* master device probe and remove. */ -static int mxc_gpu_master_probe(struct platform_device *pdev) -{ - struct component_match *match = NULL; - struct device_node * node = pdev->dev.of_node; - struct device_node *core_node; - int i = 0; + if (!res) + break; - while ((core_node = of_parse_phandle(node, "cores", i++)) != NULL) { - if (of_device_is_available(core_node)) - component_match_add(&pdev->dev, &match, compare_dev, core_node); + args->irqs[core] = irqLine; + args->registerBases[core] = res->start; + args->registerSizes[core] = res->end - res->start + 1; of_node_put(core_node); + ++core; } - return component_master_add_with_match(&pdev->dev, &mxc_gpu_master_ops, match); -} - -static int mxc_gpu_master_remove(struct platform_device *pdev) -{ - component_master_del(&pdev->dev, &mxc_gpu_master_ops); + if (core_node) + of_node_put(core_node); return 0; } -static int patch_param_imx8_subsystem(struct platform_device *pdev, - gcsMODULE_PARAMETERS *args) +static inline int get_power_imx8_subsystem(struct device *pdev) { + struct imx_priv *priv = &imxPriv; + struct clk *clk_core = NULL; + struct clk *clk_shader = NULL; + struct clk *clk_axi = NULL; + + /* Initialize the clock structure */ int i = 0; - struct resource* res; - struct device_node *node = pdev->dev.of_node; + struct device_node *node = pdev->of_node; struct device_node *core_node; int core = gcvCORE_MAJOR; +#if defined(IMX8_SCU_CONTROL) + sc_err_t sciErr; + uint32_t mu_id; + + sciErr = sc_ipc_getMuID(&mu_id); + + if (sciErr != SC_ERR_NONE) { + printk("galcore; cannot obtain mu id\n"); + return -EINVAL; + } + + sciErr = sc_ipc_open(&gpu_ipcHandle, mu_id); + + if (sciErr != SC_ERR_NONE) { + printk("galcore: cannot open MU channel to SCU\n"); + return -EINVAL; + } +#endif + while ((core_node = of_parse_phandle(node, "cores", i++)) != NULL) { - struct platform_device *pdev_gpu; - int irqLine = -1; + struct platform_device *pdev_gpu = NULL; + clk_shader = NULL; + clk_core = NULL; + clk_axi = NULL; if (!of_device_is_available(core_node)) { of_node_put(core_node); @@ -766,29 +723,65 @@ static int patch_param_imx8_subsystem(struct platform_device *pdev, if (!pdev_gpu) break; - irqLine = platform_get_irq(pdev_gpu, 0); + clk_core = clk_get(&pdev_gpu->dev, "core"); - if (irqLine < 0) + if (IS_ERR(clk_core)) { + printk("galcore: clk_get clk_core failed\n"); break; + } - res = platform_get_resource(pdev_gpu, IORESOURCE_MEM, 0); + clk_axi = clk_get(&pdev_gpu->dev, "bus"); - if (!res) - break; + if (IS_ERR(clk_axi)) + clk_axi = NULL; - args->irqs[core] = irqLine; - args->registerBases[core] = res->start; - args->registerSizes[core] = res->end - res->start + 1; + clk_shader = clk_get(&pdev_gpu->dev, "shader"); + + if (IS_ERR(clk_shader)) { + printk("galcore: clk_get clk_3d_shader failed\n"); + continue; + } + +#if defined(CONFIG_ANDROID) && LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0) + /* TODO: freescale BSP issue in some platform like imx8dv. */ + clk_prepare(clk_core); + clk_set_rate(clk_core, 800000000); + clk_unprepare(clk_core); + + clk_prepare(clk_shader); + clk_set_rate(clk_shader, 800000000); + clk_unprepare(clk_shader); +#endif + + priv->imx_gpu_clks[core].clk_shader = clk_shader; + priv->imx_gpu_clks[core].clk_core = clk_core; + priv->imx_gpu_clks[core].clk_axi = clk_axi; + +#if defined(IMX8_SCU_CONTROL) + if (of_property_read_u32(core_node, "fsl,sc_gpu_pid", &priv->sc_gpu_pid[core])) { + priv->sc_gpu_pid[core] = 0; + } +#endif +#ifdef CONFIG_PM + pm_runtime_get_noresume(&pdev_gpu->dev); + pm_runtime_set_active(&pdev_gpu->dev); + pm_runtime_enable(&pdev_gpu->dev); + pm_runtime_put_sync(&pdev_gpu->dev); + priv->pmdev[core] = &pdev_gpu->dev; +#endif of_node_put(core_node); ++core; } + priv->gpu3dCount = core; + if (core_node) of_node_put(core_node); return 0; } + #endif static int patch_param_imx6(struct platform_device *pdev, @@ -986,115 +979,6 @@ static void imx6sx_optimize_qosc_for_GPU(void) } #endif -#ifdef IMX_GPU_SUBSYSTEM -static inline int get_power_imx8_subsystem(struct device *pdev) -{ - struct imx_priv *priv = &imxPriv; - struct clk *clk_core = NULL; - struct clk *clk_shader = NULL; - struct clk *clk_axi = NULL; - - /* Initialize the clock structure */ - int i = 0; - struct device_node *node = pdev->of_node; - struct device_node *core_node; - int core = gcvCORE_MAJOR; - -#if defined(IMX8_SCU_CONTROL) - sc_err_t sciErr; - uint32_t mu_id; - - sciErr = sc_ipc_getMuID(&mu_id); - - if (sciErr != SC_ERR_NONE) { - printk("galcore; cannot obtain mu id\n"); - return -EINVAL; - } - - sciErr = sc_ipc_open(&gpu_ipcHandle, mu_id); - - if (sciErr != SC_ERR_NONE) { - printk("galcore: cannot open MU channel to SCU\n"); - return -EINVAL; - } -#endif - - while ((core_node = of_parse_phandle(node, "cores", i++)) != NULL) { - struct platform_device *pdev_gpu = NULL; - clk_shader = NULL; - clk_core = NULL; - clk_axi = NULL; - - if (!of_device_is_available(core_node)) { - of_node_put(core_node); - continue; - } - - pdev_gpu = of_find_device_by_node(core_node); - - if (!pdev_gpu) - break; - - clk_core = clk_get(&pdev_gpu->dev, "core"); - - if (IS_ERR(clk_core)) { - printk("galcore: clk_get clk_core failed\n"); - break; - } - - clk_axi = clk_get(&pdev_gpu->dev, "bus"); - - if (IS_ERR(clk_axi)) - clk_axi = NULL; - - clk_shader = clk_get(&pdev_gpu->dev, "shader"); - - if (IS_ERR(clk_shader)) { - printk("galcore: clk_get clk_3d_shader failed\n"); - continue; - } - -#if defined(CONFIG_ANDROID) && LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0) - /* TODO: freescale BSP issue in some platform like imx8dv. */ - clk_prepare(clk_core); - clk_set_rate(clk_core, 800000000); - clk_unprepare(clk_core); - - clk_prepare(clk_shader); - clk_set_rate(clk_shader, 800000000); - clk_unprepare(clk_shader); -#endif - - priv->imx_gpu_clks[core].clk_shader = clk_shader; - priv->imx_gpu_clks[core].clk_core = clk_core; - priv->imx_gpu_clks[core].clk_axi = clk_axi; - -#if defined(IMX8_SCU_CONTROL) - if (of_property_read_u32(core_node, "fsl,sc_gpu_pid", &priv->sc_gpu_pid[core])) { - priv->sc_gpu_pid[core] = 0; - } -#endif - -#ifdef CONFIG_PM - pm_runtime_get_noresume(&pdev_gpu->dev); - pm_runtime_set_active(&pdev_gpu->dev); - pm_runtime_enable(&pdev_gpu->dev); - pm_runtime_put_sync(&pdev_gpu->dev); - priv->pmdev[core] = &pdev_gpu->dev; -#endif - of_node_put(core_node); - core++; - } - - priv->gpu3dCount = core; - - if (core_node) - of_node_put(core_node); - - return 0; -} -#endif - static inline int get_power_imx6(struct device *pdev) { struct imx_priv *priv = &imxPriv; @@ -1208,9 +1092,7 @@ static inline int get_power(struct device *pdev) /*Initialize the clock structure*/ #ifdef IMX_GPU_SUBSYSTEM - struct device_node *node = pdev->of_node; - - if (node && use_imx_gpu_subsystem) + if (pdev->of_node && use_imx_gpu_subsystem) ret = get_power_imx8_subsystem(pdev); else #endif @@ -1468,17 +1350,6 @@ static int adjust_platform_driver(struct platform_driver *driver) #endif #endif -#ifdef IMX_GPU_SUBSYSTEM - if (use_imx_gpu_subsystem) { - /* Save old probe and remove. */ - gpu_probe_real = driver->probe; - gpu_remove_real = driver->remove; - - driver->probe = mxc_gpu_master_probe; - driver->remove = mxc_gpu_master_remove; - } -#endif - return 0; } @@ -1617,8 +1488,9 @@ int soc_platform_init(struct platform_driver *pdrv, struct soc_platform **platform) { #ifdef IMX_GPU_SUBSYSTEM - if (of_find_compatible_node(NULL, NULL, "fsl,imx8-gpu-ss")) + if (of_find_compatible_node(NULL, NULL, "fsl,imx8-gpu-ss")) { use_imx_gpu_subsystem = 1; + } if (of_find_compatible_node(NULL, NULL, "fsl,imx8x-gpu")) { printk(KERN_ERR "Incorrect device-tree, please update dtb."); @@ -1630,7 +1502,7 @@ int soc_platform_init(struct platform_driver *pdrv, init_priv(); #ifdef IMX_GPU_SUBSYSTEM - register_imx_gpu_sub_driver(); + register_mxc_gpu_sub_driver(); #endif *platform = &imx_platform; @@ -1640,7 +1512,7 @@ int soc_platform_init(struct platform_driver *pdrv, int soc_platform_terminate(struct soc_platform *platform) { #ifdef IMX_GPU_SUBSYSTEM - unregister_imx_gpu_sub_driver(); + unregister_mxc_gpu_sub_driver(); #endif free_priv(); diff --git a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.c b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.c index ac4958bb2678..7b677e43a543 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.c +++ b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.h b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.h index 340e58d94fe5..a29513bd2877 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.h +++ b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c index f032e7ac9524..def77c313b35 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c +++ b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.h b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.h index d9c610b13447..2ae926aa0f80 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.h +++ b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_hardware.h @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c index a3ea11e93bb3..fda0493e14c5 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c +++ b/drivers/mxc/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/drivers/mxc/gpu-viv/hal/security_v1/os/emulator/gc_hal_ta_emulator.c b/drivers/mxc/gpu-viv/hal/security_v1/os/emulator/gc_hal_ta_emulator.c index f933ddfa3f5d..b5dac8da1501 100644 --- a/drivers/mxc/gpu-viv/hal/security_v1/os/emulator/gc_hal_ta_emulator.c +++ b/drivers/mxc/gpu-viv/hal/security_v1/os/emulator/gc_hal_ta_emulator.c @@ -2,7 +2,7 @@ * * The MIT License (MIT) * -* Copyright (c) 2014 - 2017 Vivante Corporation +* Copyright (c) 2014 - 2018 Vivante Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ * * The GPL License (GPL) * -* Copyright (C) 2014 - 2017 Vivante Corporation +* Copyright (C) 2014 - 2018 Vivante Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License |