diff options
| author | Liu Ying <b17645@freescale.com> | 2010-02-10 10:36:44 -0500 |
|---|---|---|
| committer | Liu Ying <b17645@freescale.com> | 2010-02-10 10:36:44 -0500 |
| commit | ee991fa2b73c9877485485b1ad307718ba524e71 (patch) | |
| tree | 5c85c97fd6308ac0e82754171062cde9ba00f019 /drivers/mxc/ipu3 | |
| parent | 571b93e07d14e58d3e653f7950459da30fdff050 (diff) | |
ENGR00120807 V4L2 capture:Change the mechanism for CSI->MEM capture
As CSI->MEM channel keeps on writing the buffer which is set to
ready latestly and raising up end of frame interrupts, the current
v4l2 capture realization mechanism is not appropriate for this channel.
This patch will update the idmac buffer to a dummy buffer whenever
there is no buffers queued by the user.
Signed-off-by: Liu Ying <b17645@freescale.com>
Diffstat (limited to 'drivers/mxc/ipu3')
| -rw-r--r-- | drivers/mxc/ipu3/ipu_common.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c index 0cb367bf38c6..fedd9803ee11 100644 --- a/drivers/mxc/ipu3/ipu_common.c +++ b/drivers/mxc/ipu3/ipu_common.c @@ -380,8 +380,8 @@ static int ipu_probe(struct platform_device *pdev) /* DMFC Init */ _ipu_dmfc_init(DMFC_NORMAL, 1); - /* Set sync refresh channels as high priority */ - __raw_writel(0x18800000L, IDMAC_CHA_PRI(0)); + /* Set sync refresh channels and CSI->mem channel as high priority */ + __raw_writel(0x18800001L, IDMAC_CHA_PRI(0)); /* Set MCU_T to divide MCU access window into 2 */ __raw_writel(0x00400000L | (IPU_MCU_T_DEFAULT << 18), IPU_DISP_GEN); |