diff options
| author | Liu Ying <Ying.Liu@freescale.com> | 2011-10-08 13:30:15 +0800 |
|---|---|---|
| committer | Andy Voltz <andy.voltz@timesys.com> | 2012-03-09 11:26:44 -0500 |
| commit | b44861788843b0be3a87b918632d3249c5f938a0 (patch) | |
| tree | 0547778596315bb7dbd0ff732b7d3d35081eff20 /drivers/mxc | |
| parent | 4f190080f27f51351833bf964342296b305aff5c (diff) | |
ENGR00159010 IPUv3:Restore IDMAC_CH_LOCK_EN_1 for resume
This patch restores IDMAC_CH_LOCK_EN_1 register when IPUv3
driver resumes. This avoid the relative issue if setting
IDMAC_CH_LOCK_EN_1 to be zero.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit fce84cf35dcb338886df8e58f66a7ad1048d2abe)
Diffstat (limited to 'drivers/mxc')
| -rw-r--r-- | drivers/mxc/ipu3/ipu_common.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c index 4b12905d0c29..1f5ed8bc10a5 100644 --- a/drivers/mxc/ipu3/ipu_common.c +++ b/drivers/mxc/ipu3/ipu_common.c @@ -2780,6 +2780,9 @@ static int ipu_resume(struct platform_device *pdev) /* Set sync refresh channels as high priority */ __raw_writel(0x18800001L, IDMAC_CHA_PRI(0)); + + /* AXI burst setting for sync refresh channels */ + __raw_writel(0x003F0000, IDMAC_CH_LOCK_EN_1); clk_disable(g_ipu_clk); } mutex_unlock(&ipu_clk_lock); |