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authorMichael Chan <mchan@broadcom.com>2008-06-19 16:37:42 -0700
committerDavid S. Miller <davem@davemloft.net>2008-06-19 16:37:42 -0700
commit35e9010b22503f42cbf88144ffe1feff90ea3835 (patch)
treeee2c0e5ae61ee6a7508cce38ed2a79ce52049d38 /drivers/net/bnx2.h
parent4497b0763cb1afae463f5e144c28b5d806e28b60 (diff)
bnx2: Put tx ring variables in a separate struct.
In preparation for multi-ring support, tx ring variables are now put in a separate bnx2_tx_ring_info struct. Multi tx ring will not be enabled until it is fully supported by the stack. Only 1 tx ring will be used at the moment. The functions to allocate/free tx memory and to initialize tx rings are now modified to handle multiple rings. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r--drivers/net/bnx2.h34
1 files changed, 18 insertions, 16 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index be7ccb5b77da..e4f0fb45bc6d 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6569,6 +6569,21 @@ struct bnx2_irq {
char name[16];
};
+struct bnx2_tx_ring_info {
+ u32 tx_prod_bseq;
+ u16 tx_prod;
+ u32 tx_bidx_addr;
+ u32 tx_bseq_addr;
+
+ struct tx_bd *tx_desc_ring;
+ struct sw_bd *tx_buf_ring;
+
+ u16 tx_cons;
+ u16 hw_tx_cons;
+
+ dma_addr_t tx_desc_mapping;
+};
+
struct bnx2_napi {
struct napi_struct napi ____cacheline_aligned;
struct bnx2 *bp;
@@ -6577,9 +6592,6 @@ struct bnx2_napi {
u32 last_status_idx;
u32 int_num;
- u16 tx_cons;
- u16 hw_tx_cons;
-
u32 rx_prod_bseq;
u16 rx_prod;
u16 rx_cons;
@@ -6587,6 +6599,7 @@ struct bnx2_napi {
u16 rx_pg_prod;
u16 rx_pg_cons;
+ struct bnx2_tx_ring_info tx_ring;
};
struct bnx2 {
@@ -6614,14 +6627,6 @@ struct bnx2 {
BNX2_FLAG_USING_MSIX)
#define BNX2_FLAG_JUMBO_BROKEN 0x00000800
- /* Put tx producer and consumer fields in separate cache lines. */
-
- u32 tx_prod_bseq __attribute__((aligned(L1_CACHE_BYTES)));
- u16 tx_prod;
- u8 tx_vec;
- u32 tx_bidx_addr;
- u32 tx_bseq_addr;
-
struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC];
#ifdef BCM_VLAN
@@ -6643,8 +6648,6 @@ struct bnx2 {
struct rx_bd *rx_pg_desc_ring[MAX_RX_PG_RINGS];
/* TX constants */
- struct tx_bd *tx_desc_ring;
- struct sw_bd *tx_buf_ring;
int tx_ring_size;
u32 tx_wake_thresh;
@@ -6722,9 +6725,6 @@ struct bnx2 {
u16 fw_wr_seq;
u16 fw_drv_pulse_wr_seq;
- dma_addr_t tx_desc_mapping;
-
-
int rx_max_ring;
int rx_ring_size;
dma_addr_t rx_desc_mapping[MAX_RX_RINGS];
@@ -6812,6 +6812,8 @@ struct bnx2 {
struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC];
int irq_nvecs;
+
+ u8 num_tx_rings;
};
#define REG_RD(bp, offset) \