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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2016-06-24 15:16:25 +0200
committerDavid S. Miller <davem@davemloft.net>2016-06-28 08:54:23 -0400
commit3fe5cadbd3494b9d0fcea41ccefeb319528c774e (patch)
tree6301e478e55fdc4c53ffef0270cd1a4224504398 /drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
parent70523e639bf8ca09b3357371c3546cee55c06351 (diff)
drivers: net: stmmac: rework core ISR to better manage PCS and PMT
By default, all gmac cores disable the PCS block and always enable the PMT. Note that this is done in a different way by 3.x and 4.x cores. With this rework, PCS and PMT interrupt masks can be driven by parameters now moved inside the mac_device_info structure and the settings follow what the HW capability register reports. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 207d8bb0c80b..747f3cf1e20b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -35,7 +35,13 @@ static void dwmac4_core_init(struct mac_device_info *hw, int mtu)
writel(value, ioaddr + GMAC_CONFIG);
/* Mask GMAC interrupts */
- writel(GMAC_INT_PMT_EN, ioaddr + GMAC_INT_EN);
+ value = GMAC_INT_DEFAULT_MASK;
+ if (hw->pmt)
+ value |= GMAC_INT_PMT_EN;
+ if (hw->pcs)
+ value |= GMAC_PCS_IRQ_DEFAULT;
+
+ writel(value, ioaddr + GMAC_INT_EN);
}
static void dwmac4_dump_regs(struct mac_device_info *hw)