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authorJesse Brandeburg <jesse.brandeburg@intel.com>2009-04-27 22:36:13 +0000
committerDavid S. Miller <davem@davemloft.net>2009-04-28 01:53:14 -0700
commitb9473560c6d882e0fbd3a8817e906c847b11c722 (patch)
treee183dd56fc93e201c92e596b5603e6ebb99776a1 /drivers/net/igb/e1000_defines.h
parent8dc92f7e2ecfd93f5c57da78594a7a5482e2c15e (diff)
igb: Enable SCTP checksum offloading
Originally from: Vlad Yasevich <vladislav.yasevich@hp.com> This patch, both the driver portion and the sctp code was modified by Jesse Brandeburg and is Copyright(c) 2009 Intel Corporation. Thanks go to Vlad for starting this work. Intel 82576 chipset supports SCTP checksum offloading. This patch enables this functionality in the driver. A new NETIF feature is introduced for SCTP checksum offload. If the driver supports CRC32c checksum, it can set this feature flag. The hardware can offload both transmit and receive. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Vlad Yasevich <vladislav.yasevich@hp.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_defines.h')
-rw-r--r--drivers/net/igb/e1000_defines.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h
index 65acbbaca2d5..3bda3db73f1f 100644
--- a/drivers/net/igb/e1000_defines.h
+++ b/drivers/net/igb/e1000_defines.h
@@ -291,6 +291,7 @@
/* Receive Checksum Control */
#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */
#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */
+#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */
#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */
/* Header split receive */