diff options
author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2011-03-22 22:38:31 +0000 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-03-23 12:24:22 -0700 |
commit | 1679200f91da6a054b06954c9bd3eeed29b6731f (patch) | |
tree | a447268debe479a257cfff4c7e5e86151eef6583 /drivers/net/mlx4/en_port.c | |
parent | b12d93d63c3217f0ec923ff938b12a744e242ffa (diff) |
mlx4_en: Enabling new steering
The mlx4_en module now uses the new steering mechanism.
The RX packets are now steered through the MCG table instead
of Mac table for unicast, and default entry for multicast.
The feature is enabled through INIT_HCA
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/mlx4/en_port.c')
-rw-r--r-- | drivers/net/mlx4/en_port.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/mlx4/en_port.c b/drivers/net/mlx4/en_port.c index a2b0bc4ada5d..f2a4f5dd313d 100644 --- a/drivers/net/mlx4/en_port.c +++ b/drivers/net/mlx4/en_port.c @@ -119,6 +119,10 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, struct mlx4_set_port_rqp_calc_context *context; int err; u32 in_mod; + u32 m_promisc = (dev->caps.vep_mc_steering) ? MCAST_DIRECT : MCAST_DEFAULT; + + if (dev->caps.vep_mc_steering && dev->caps.vep_uc_steering) + return 0; mailbox = mlx4_alloc_cmd_mailbox(dev); if (IS_ERR(mailbox)) @@ -127,8 +131,11 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, memset(context, 0, sizeof *context); context->base_qpn = cpu_to_be32(base_qpn); - context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_EN_SHIFT | base_qpn); - context->mcast = cpu_to_be32(1 << SET_PORT_PROMISC_MODE_SHIFT | base_qpn); + context->n_mac = 0x7; + context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | + base_qpn); + context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | + base_qpn); context->intra_no_vlan = 0; context->no_vlan = MLX4_NO_VLAN_IDX; context->intra_vlan_miss = 0; |