diff options
| author | ravinandan.arakali@neterion.com <ravinandan.arakali@neterion.com> | 2005-10-17 18:26:20 -0700 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-10-18 16:58:27 -0400 |
| commit | ad4ebed00fbf570411edbf6eb6c391e16b71df25 (patch) | |
| tree | 37f236700d5e831fee6bf8494cd57753231ddf14 /drivers/net/s2io-regs.h | |
| parent | 59aee3c2a1e69fe5062bd1facb72d6fcea3f3f8f (diff) | |
[PATCH] S2io: Offline diagnostics fixes
This patch fixes the following bugs with offline diagnostics
code(run with "ethtool -t").
1. After running offline diagnostics, adapter would report
corrupted packets on receive. This was because of adapter not
being brought out of "RLDRAM test mode".
2. Current EEPROM test works only for Xframe I. Since Xframe II
uses different interface(SPI), support for this interface has
been added. Also, since SPI supports write access to all areas
of EEPROM, negative testing is done only for Xframe I.
3. Return values from subfunctions of offline diagnostics have
been corrected.
4. In register test, expected value from rx_queue_cfg register
is made to depend on adapter type.
5. After the test, need to restore values at EEPROM offsets
0x4F0 and 0x7F0. These locations were modified as part of test.
6. Use macro SPECIAL_REG_WRITE for write access to mc_rldram_test_ctrl
register. Also, couple of unnecessary writes to mc_rldram_test_ctrl
have been removed.
Signed-off-by: Ravinandan Arakali <ravinandan.arakali@neterion.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/s2io-regs.h')
| -rw-r--r-- | drivers/net/s2io-regs.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h index 7cefe5507b9e..00179bc3437f 100644 --- a/drivers/net/s2io-regs.h +++ b/drivers/net/s2io-regs.h @@ -814,6 +814,17 @@ typedef struct _XENA_dev_config { u64 rxgxs_ber_0; /* CHANGED */ u64 rxgxs_ber_1; /* CHANGED */ + u64 spi_control; +#define SPI_CONTROL_KEY(key) vBIT(key,0,4) +#define SPI_CONTROL_BYTECNT(cnt) vBIT(cnt,29,3) +#define SPI_CONTROL_CMD(cmd) vBIT(cmd,32,8) +#define SPI_CONTROL_ADDR(addr) vBIT(addr,40,24) +#define SPI_CONTROL_SEL1 BIT(4) +#define SPI_CONTROL_REQ BIT(7) +#define SPI_CONTROL_NACK BIT(5) +#define SPI_CONTROL_DONE BIT(6) + u64 spi_data; +#define SPI_DATA_WRITE(data,len) vBIT(data,0,len) } XENA_dev_config_t; #define XENA_REG_SPACE sizeof(XENA_dev_config_t) |