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authorBen Hutchings <bhutchings@solarflare.com>2009-08-26 08:16:46 +0000
committerDavid S. Miller <davem@davemloft.net>2009-08-26 17:38:51 -0700
commitd4ec09acdb15cdb5afdb5cd03f6bceb5c3c690a5 (patch)
tree11b9a9e797958a86b4c33ffc8710a4528f7b4ba5 /drivers/net/sfc/falcon_xmac.c
parentaed0628dae0c26b47d40d65f942abe30279b52a5 (diff)
sfc: Do not reinitialise XAUI serdes before it has completed reset
falcon_reset_xaui() waits for XGXS reset to complete, but the XAUI serdes reset may take longer. It needs to check both reset active bits. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon_xmac.c')
-rw-r--r--drivers/net/sfc/falcon_xmac.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/sfc/falcon_xmac.c b/drivers/net/sfc/falcon_xmac.c
index 2b3269c03263..bec52ca37eee 100644
--- a/drivers/net/sfc/falcon_xmac.c
+++ b/drivers/net/sfc/falcon_xmac.c
@@ -64,13 +64,15 @@ int falcon_reset_xaui(struct efx_nic *efx)
efx_oword_t reg;
int count;
+ /* Start reset sequence */
EFX_POPULATE_DWORD_1(reg, XX_RST_XX_EN, 1);
falcon_write(efx, &reg, XX_PWR_RST_REG);
- /* Give some time for the link to establish */
- for (count = 0; count < 1000; count++) { /* wait upto 10ms */
+ /* Wait up to 10 ms for completion, then reinitialise */
+ for (count = 0; count < 1000; count++) {
falcon_read(efx, &reg, XX_PWR_RST_REG);
- if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0) {
+ if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0 &&
+ EFX_OWORD_FIELD(reg, XX_SD_RST_ACT) == 0) {
falcon_setup_xaui(efx);
return 0;
}