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authorSteve Hodgson <shodgson@solarflare.com>2011-03-22 19:46:43 +0000
committerBen Hutchings <bhutchings@solarflare.com>2011-03-23 01:35:15 +0000
commitd88d6b05fee3cc78e5b0273eb58c31201dcc6b76 (patch)
treeba6286ba53298271070c217492f39bdb259681e4 /drivers/net/sfc/workarounds.h
parent736561a01f11114146b1b7f82d486fa9c95828ef (diff)
sfc: Siena: Disable write-combining when SR-IOV is enabled
If SR-IOV is enabled by firmware, even if it is not enabled in the PCI capability, TX pushes using write-combining may be corrupted. We want to know whether it is enabled before mapping the NIC registers, and even if PCI extended capabilities are not accessible. Therefore, we look for the MSI capability, which is removed if SR-IOV is enabled. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Diffstat (limited to 'drivers/net/sfc/workarounds.h')
-rw-r--r--drivers/net/sfc/workarounds.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h
index e4dd3a7f304b..99ff11400cef 100644
--- a/drivers/net/sfc/workarounds.h
+++ b/drivers/net/sfc/workarounds.h
@@ -38,6 +38,8 @@
#define EFX_WORKAROUND_15783 EFX_WORKAROUND_ALWAYS
/* Legacy interrupt storm when interrupt fifo fills */
#define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA
+/* Write combining and sriov=enabled are incompatible */
+#define EFX_WORKAROUND_22643 EFX_WORKAROUND_SIENA
/* Spurious parity errors in TSORT buffers */
#define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A