diff options
| author | Stephen Hemminger <shemminger@osdl.org> | 2005-09-19 15:42:33 -0700 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-09-21 22:30:52 -0400 |
| commit | 79e57d32fe6d2d5bd38378f6dccfdbe6bd1d1dab (patch) | |
| tree | e3db01e9454ac7b42957087530d7cc6ed7381b2d /drivers/net/sky2.h | |
| parent | 08217637fe8a0ba24e1bfc893569f9be4d836c6a (diff) | |
[PATCH] sky2: fix FIFO DMA alignment problems
The Yukon2 chip FIFO has a problem recovering from a pause frame
if the receive buffer is not aligned. The workaround is to just
leave receive buffer at original alignment, which will make IP
header unaligned. Rework receive logic for clarity.
Need to ignore receive overrun interrupts (or mac hangs).
These fixes make the sky2 driver generally usable.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/sky2.h')
| -rw-r--r-- | drivers/net/sky2.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 9256303acf76..1a8a004e1060 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h @@ -1679,7 +1679,7 @@ enum { GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */ GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */ -#define GMAC_DEF_MSK (GM_IS_TX_FF_UR|GM_IS_RX_FF_OR) +#define GMAC_DEF_MSK GM_IS_TX_FF_UR /* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */ /* Bits 15.. 2: reserved */ |