diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2008-11-03 16:54:15 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-11-03 16:54:15 -0800 |
| commit | 0a459aac9d151c2e36ec65723b9b845b24c5cbc3 (patch) | |
| tree | a3534dee05580e2061ef270e0b81f25ad8a6a256 /drivers/net/tg3.h | |
| parent | 05ac4cb7dff4515447dce6e9a56c4de6b7e426d5 (diff) | |
tg3: Allow WOL for phylib controlled Broadcom phys
This patch allows WOL to be enabled for Broadcom phys under phylib
control. The only exception is the AC131, which has a completely
different register set.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 417de07ca895..d7ce3a05a3e4 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -1795,6 +1795,11 @@ #define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ +#define MII_TG3_AUXCTL_PCTL_100TX_LPWR 0x0010 +#define MII_TG3_AUXCTL_PCTL_SPR_ISOLATE 0x0020 +#define MII_TG3_AUXCTL_PCTL_VREG_11V 0x0180 +#define MII_TG3_AUXCTL_SHDWSEL_PWRCTL 0x0002 + #define MII_TG3_AUXCTL_MISC_WREN 0x8000 #define MII_TG3_AUXCTL_MISC_FORCE_AMDIX 0x0200 #define MII_TG3_AUXCTL_MISC_RDSEL_MISC 0x7000 @@ -2590,7 +2595,10 @@ struct tg3 { #define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */ #define TG3_PHY_ID_BCM50610 0x143bd60 #define TG3_PHY_ID_BCMAC131 0x143bc70 - +#define TG3_PHY_OUI_MASK 0xfffffc00 +#define TG3_PHY_OUI_1 0x00206000 +#define TG3_PHY_OUI_2 0x0143bc00 +#define TG3_PHY_OUI_3 0x03625c00 u32 led_ctrl; u32 phy_otp; |