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authorMichal Kazior <michal.kazior@tieto.com>2014-08-22 14:33:14 +0200
committerKalle Valo <kvalo@qca.qualcomm.com>2014-08-25 11:31:47 +0300
commit728f95eef5238bffdb20e511f5cd553321d404c3 (patch)
treef3603b906f383d3c33908ba32aafef90fd56db2e /drivers/net/wireless/ath/ath10k/pci.h
parent5c771e7454d148af35e8b4297d00f880de79ea49 (diff)
ath10k: rework posting pci rx buffers
It was possible on a host system running low on memory to end up with no rx buffers on pci pipes. This makes the driver more robust as it won't fail to start if it can't allocate all rx buffers right away. If it is fatal then upper layers will notice trouble anyway. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.h')
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index caed918c7102..b9aa692d22f1 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -181,6 +181,7 @@ struct ath10k_pci {
/* Map CE id to ce_state */
struct ath10k_ce_pipe ce_states[CE_COUNT_MAX];
+ struct timer_list rx_post_retry;
};
static inline struct ath10k_pci *ath10k_pci_priv(struct ath10k *ar)
@@ -188,6 +189,7 @@ static inline struct ath10k_pci *ath10k_pci_priv(struct ath10k *ar)
return (struct ath10k_pci *)ar->drv_priv;
}
+#define ATH10K_PCI_RX_POST_RETRY_MS 50
#define ATH_PCI_RESET_WAIT_MAX 10 /* ms */
#define PCIE_WAKE_TIMEOUT 5000 /* 5ms */