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authorSujith <Sujith.Manoharan@atheros.com>2009-08-07 09:45:23 +0530
committerJohn W. Linville <linville@tuxdriver.com>2009-08-14 09:13:35 -0400
commit7f63845f2a5f54c64968a4221561c619468b8a54 (patch)
treece7675b78c54cc1a0620f0b7e21d3e813883f5ff /drivers/net/wireless/ath/ath9k/phy.h
parent066edc80ebd9e429d593dcfe97b3ed01c9823847 (diff)
ath9k: Clean antenna configuration for 4K EEPROM chips
This patch revamps the antenna configuration mechanism for 4K chips. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/phy.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index 5317e0503f64..e83cd4ab87f0 100644
--- a/drivers/net/wireless/ath/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -419,6 +419,7 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0
#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6
#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000
+#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV_S 13
#define AR_PHY_GAIN_2GHZ 0xA20C
#define AR_PHY_GAIN_2GHZ_RXTX_MARGIN 0x00FC0000