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authorEran Harary <eran.harary@intel.com>2015-03-03 16:19:36 +0200
committerEmmanuel Grumbach <emmanuel.grumbach@intel.com>2015-03-19 15:03:14 +0200
commit28c8c19a0004a74cd6303fa088b33212d0d80536 (patch)
tree55eb74da75011622d642560c4109b842a939cabd /drivers/net/wireless/iwlwifi/iwl-prph.h
parentbcd535eb5313947917a6a00c2a65561853b1be70 (diff)
iwlwifi: mvm: don't wait for firmware verification
The firmware has a race in the flow that indicates the completion of the authentication. Checking the completion of the authentication is not really needed anyway since we can wait for the ALIVE notification instead. Remove the unneeded and buggy code. Signed-off-by: Eran Harary <eran.harary@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-prph.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-prph.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h
index bc962888c583..467c4bc68269 100644
--- a/drivers/net/wireless/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/iwlwifi/iwl-prph.h
@@ -295,25 +295,6 @@
#define OSC_CLK (0xa04068)
#define OSC_CLK_FORCE_CONTROL (0x8)
-/* SECURE boot registers */
-#define LMPM_SECURE_BOOT_CONFIG_ADDR (0x100)
-enum secure_boot_config_reg {
- LMPM_SECURE_BOOT_CONFIG_INSPECTOR_BURNED_IN_OTP = 0x00000001,
- LMPM_SECURE_BOOT_CONFIG_INSPECTOR_NOT_REQ = 0x00000002,
-};
-
-#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR_B0 (0xA01E30)
-#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR (0x1E30)
-#define LMPM_SECURE_BOOT_CPU2_STATUS_ADDR (0x1E34)
-enum secure_boot_status_reg {
- LMPM_SECURE_BOOT_CPU_STATUS_VERF_STATUS = 0x00000001,
- LMPM_SECURE_BOOT_CPU_STATUS_VERF_COMPLETED = 0x00000002,
- LMPM_SECURE_BOOT_CPU_STATUS_VERF_SUCCESS = 0x00000004,
- LMPM_SECURE_BOOT_CPU_STATUS_VERF_FAIL = 0x00000008,
- LMPM_SECURE_BOOT_CPU_STATUS_SIGN_VERF_FAIL = 0x00000010,
- LMPM_SECURE_BOOT_STATUS_SUCCESS = 0x00000003,
-};
-
#define FH_UCODE_LOAD_STATUS (0x1AF0)
#define CSR_UCODE_LOAD_STATUS_ADDR (0x1E70)
enum secure_load_status_reg {
@@ -334,8 +315,6 @@ enum secure_load_status_reg {
#define LMPM_SECURE_CPU1_HDR_MEM_SPACE (0x420000)
#define LMPM_SECURE_CPU2_HDR_MEM_SPACE (0x420400)
-#define LMPM_SECURE_TIME_OUT (100) /* 10 micro */
-
/* Rx FIFO */
#define RXF_SIZE_ADDR (0xa00c88)
#define RXF_RD_D_SPACE (0xa00c40)