diff options
| author | Ivo van Doorn <ivdoorn@gmail.com> | 2008-03-09 22:49:04 +0100 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2008-03-13 19:32:31 -0400 |
| commit | 89993890aeb8fe58b2d49b2661965524802ab73c (patch) | |
| tree | d541a26a8a370401ef2c4d0cafdd8868853ed127 /drivers/net/wireless/rt2x00/rt2400pci.h | |
| parent | dac37d720860bbbc535adc90249184308501c1f0 (diff) | |
rt2x00: Fix rt2400pci signal
After sampling hundreds of RX frame descriptors,
the results were conclusive:
- The Ralink documentation regarding the SIGNAL and RSSI are wrong.
It turns out that of the 5 BBR registers, we should not use BBR0 and BBR1
for SIGNAL and RSSI respectively, but actually BBR1 and BBR2.
BBR0 does show values, but the exact meaning remains unclear,
but they cannot be translated into a SIGNAL or RSSI field.
BBR3, BBR4 and BBR5 are always 0, so their meaning is unknown.
As it turns out, the reported SIGNAL is the PLCP value, this
in contradiction to what was expected looking at rt2500pci which
only reported the PLCP values for OFDM rates and bitrate values
for CCK rates.
This means we should let the driver raise the flag about the contents
of the SIGNAL field so rt2x00lib can always do the right thing based
on what the driver reports.
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2400pci.h')
| -rw-r--r-- | drivers/net/wireless/rt2x00/rt2400pci.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.h b/drivers/net/wireless/rt2x00/rt2400pci.h index da178d44660e..a5210f9a3360 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.h +++ b/drivers/net/wireless/rt2x00/rt2400pci.h @@ -899,13 +899,13 @@ * Word2 */ #define RXD_W2_BUFFER_LENGTH FIELD32(0x0000ffff) -#define RXD_W2_SIGNAL FIELD32(0x00ff0000) -#define RXD_W2_RSSI FIELD32(0xff000000) +#define RXD_W2_BBR0 FIELD32(0x00ff0000) +#define RXD_W2_SIGNAL FIELD32(0xff000000) /* * Word3 */ -#define RXD_W3_BBR2 FIELD32(0x000000ff) +#define RXD_W3_RSSI FIELD32(0x000000ff) #define RXD_W3_BBR3 FIELD32(0x0000ff00) #define RXD_W3_BBR4 FIELD32(0x00ff0000) #define RXD_W3_BBR5 FIELD32(0xff000000) |