diff options
| author | Rob Herring <r.herring@freescale.com> | 2009-10-08 09:21:24 -0500 |
|---|---|---|
| committer | Alejandro Gonzalez <alex.gonzalez@digi.com> | 2010-02-12 17:19:12 +0100 |
| commit | e9e3cc0efd591817f3b4966e65c37608b88168ac (patch) | |
| tree | e0ee400686996dac923401a65d9664b52c1158cf /drivers/net | |
| parent | e115859801a40c7405a3e52dc170d18b8f590c9a (diff) | |
fec: Add RMII gasket support
New versions of FEC support reduced MII interface. Currently only MX25
supports this.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/fec.c | 31 | ||||
| -rw-r--r-- | drivers/net/fec.h | 4 |
2 files changed, 35 insertions, 0 deletions
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index 6392a6774baa..39bf9bbec12f 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c @@ -134,6 +134,19 @@ typedef struct { #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ +/* + * RMII mode to be configured via a gasket + */ +#define FEC_MIIGSK_CFGR_FRCONT (1 << 6) +#define FEC_MIIGSK_CFGR_LBMODE (1 << 4) +#define FEC_MIIGSK_CFGR_EMODE (1 << 3) +#define FEC_MIIGSK_CFGR_IF_MODE_MASK (3 << 0) +#define FEC_MIIGSK_CFGR_IF_MODE_MII (0 << 0) +#define FEC_MIIGSK_CFGR_IF_MODE_RMII (1 << 0) + +#define FEC_MIIGSK_ENR_READY (1 << 2) +#define FEC_MIIGSK_ENR_EN (1 << 1) + /* The FEC stores dest/src/type, data, and checksum for receive packets. */ #define PKT_MAXBUF_SIZE 1518 @@ -1781,6 +1794,24 @@ fec_restart(struct net_device *dev, int duplex) writel(0, fep->hwp + FEC_HASH_TABLE_LOW); #endif + if (cpu_is_mx25()) { + /* + * Set up the MII gasket for RMII mode + */ + printk("%s: enable RMII gasket\n", dev->name); + + /* disable the gasket and wait */ + __raw_writel(0, fep->hwp + FEC_MIIGSK_ENR); + while (__raw_readl(fep->hwp + FEC_MIIGSK_ENR) & FEC_MIIGSK_ENR_READY) + udelay(1); + + /* configure the gasket for RMII, 50 MHz, no loopback, no echo */ + __raw_writel(FEC_MIIGSK_CFGR_IF_MODE_RMII, fep->hwp + FEC_MIIGSK_CFGR); + + /* re-enable the gasket */ + __raw_writel(FEC_MIIGSK_ENR_EN, fep->hwp + FEC_MIIGSK_ENR); + } + /* Set maximum receive buffer size. */ writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE); diff --git a/drivers/net/fec.h b/drivers/net/fec.h index cc47f3f057c7..0e8dbba9f817 100644 --- a/drivers/net/fec.h +++ b/drivers/net/fec.h @@ -43,6 +43,8 @@ #define FEC_R_DES_START 0x180 /* Receive descriptor ring */ #define FEC_X_DES_START 0x184 /* Transmit descriptor ring */ #define FEC_R_BUFF_SIZE 0x188 /* Maximum receive buff size */ +#define FEC_MIIGSK_CFGR 0x300 /* MIIGSK config register */ +#define FEC_MIIGSK_ENR 0x308 /* MIIGSK enable register */ #else @@ -69,6 +71,8 @@ #define FEC_X_DES_START 0x3d4 /* Transmit descriptor ring */ #define FEC_R_BUFF_SIZE 0x3d8 /* Maximum receive buff size */ #define FEC_FIFO_RAM 0x400 /* FIFO RAM buffer */ +#define FEC_MIIGSK_CFGR 0x000 /* MIIGSK config register */ +#define FEC_MIIGSK_ENR 0x000 /* MIIGSK enable register */ #endif /* CONFIG_M5272 */ |