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authorFelipe Balbi <balbi@ti.com>2014-09-08 14:39:01 -0500
committerFelipe Balbi <balbi@ti.com>2014-09-08 14:39:01 -0500
commitf7cc38b16e2741186253be3dff61a9d124112126 (patch)
treeefce170d7c0c4baf6924275e6a42d11fa47c9290 /drivers/pci/host/pcie-designware.h
parentefb540c895d2cb77b1472edda6ca45d40719a041 (diff)
parent2ce7598c9a453e0acd0e07be7be3f5eb39608ebd (diff)
Merge tag 'v3.17-rc4' into next
Merge Linux 3.17-rc4 here so we have all the latest fixes on next too. This also cleans up a few conflicts when applying patches. Signed-off-by: Felipe Balbi <balbi@ti.com> Conflicts: drivers/usb/gadget/Makefile drivers/usb/gadget/function/Makefile drivers/usb/gadget/legacy/Makefile drivers/usb/phy/phy-samsung-usb.h
Diffstat (limited to 'drivers/pci/host/pcie-designware.h')
-rw-r--r--drivers/pci/host/pcie-designware.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index 77f592faa7bf..daf81f922cda 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -36,11 +36,15 @@ struct pcie_port {
u8 root_bus_nr;
void __iomem *dbi_base;
u64 cfg0_base;
+ u64 cfg0_mod_base;
void __iomem *va_cfg0_base;
u64 cfg1_base;
+ u64 cfg1_mod_base;
void __iomem *va_cfg1_base;
u64 io_base;
+ u64 io_mod_base;
u64 mem_base;
+ u64 mem_mod_base;
struct resource cfg;
struct resource io;
struct resource mem;
@@ -61,8 +65,15 @@ struct pcie_host_ops {
u32 val, void __iomem *dbi_base);
int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val);
+ int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
+ unsigned int devfn, int where, int size, u32 *val);
+ int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
+ unsigned int devfn, int where, int size, u32 val);
int (*link_up)(struct pcie_port *pp);
void (*host_init)(struct pcie_port *pp);
+ void (*msi_set_irq)(struct pcie_port *pp, int irq);
+ void (*msi_clear_irq)(struct pcie_port *pp, int irq);
+ u32 (*get_msi_data)(struct pcie_port *pp);
};
int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);