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authorEric W. Biederman <ebiederm@xmission.com>2007-03-05 00:30:11 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-05 07:57:50 -0800
commit58e0543e8f355b32f0778a18858b255adb7402ae (patch)
tree4533c928f846e737f218573bbd326e63280c179d /drivers/pci/msi.c
parentb1cbf4e4dddd708ba268c3a2bf38383a269d490a (diff)
[PATCH] msi: support masking msi irqs without a mask bit
For devices that do not support msi-x we only support 1 interrupt. Therefore we can disable that one interrupt by disabling the msi capability itself. If we leave the intx interrupts disabled while we have the msi capability disabled no interrupts should be delivered from that device. Devices with just the minimal msi support (and thus hitting this code path) include things like the intel e1000 nic, so it looks like is going to be a fairly common case and thus important to get right. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index c43e7d22e180..01869b1782e4 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,6 +85,8 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
mask_bits &= ~(1);
mask_bits |= flag;
pci_write_config_dword(entry->dev, pos, mask_bits);
+ } else {
+ msi_set_enable(entry->dev, !flag);
}
break;
case PCI_CAP_ID_MSIX: