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| author | Bjorn Helgaas <bhelgaas@google.com> | 2019-03-06 15:30:11 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-03-06 15:30:11 -0600 |
| commit | 5d130e3dd8b6995e93aeb7a740709a46e7acf5df (patch) | |
| tree | 5626eb1d39b398bd6e485f65915219e24291fe7c /drivers/pci/pci.c | |
| parent | 1bd2e9ee5c0d3254cf90ad60794b56047070ce7f (diff) | |
| parent | 2e095ce7b6ecce2f3e2ff330527f12056ed1e1a1 (diff) | |
Merge branch 'pci/enumeration'
- Probe bridge window attributes only once at enumeration-time to fix
device accesses during rescan (Bjorn Helgaas)
- Return BAR size (not "size -1 ") from pci_size() to simplify code (Du
Changbin)
- Use config header type (not class code) identify bridges more reliably
(Honghui Zhang)
- Work around Intel Denverton incorrect Trace Hub BAR size reporting
(Alexander Shishkin)
* pci/enumeration:
x86/PCI: Fixup RTIT_BAR of Intel Denverton Trace Hub
PCI: Rely on config space header type, not class code
PCI: Make pci_size() return real BAR size
PCI: Probe bridge window attributes once at enumeration-time
Diffstat (limited to 'drivers/pci/pci.c')
| -rw-r--r-- | drivers/pci/pci.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 13d65991c77b..9ba18515ccc5 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -6049,8 +6049,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) * to enable the kernel to reassign new resource * window later on. */ - if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE && - (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { + if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) { r = &dev->resource[i]; if (!(r->flags & IORESOURCE_MEM)) |