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authorRichard Zhu <r65037@freescale.com>2014-09-30 16:11:57 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-09-17 09:20:25 -0500
commit0d720e0a53b72f8acfe73a4efd54e1f123134deb (patch)
tree2f2565bd53a38765d26466ad8513ecd95b33cde9 /drivers/pci
parent531c1ff741bdbb0c980331b33944511bc03e2f47 (diff)
MLK-10009-6 PCI: designware: Fix one potential assignment error of cfg start
if va_cfg0_base/va_cfg1_base are initialized by designware core, the pp->cfg.start is not initialized properly, when IORESOURCE_MEM "config" is represented as cfg space resource. solution: assign cfg_res->start to pp->cfg.start. Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-designware.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 1a2b47739f44..3edd94daa3a7 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -450,6 +450,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
if (cfg_res) {
pp->config.cfg0_size = resource_size(cfg_res)/2;
pp->config.cfg1_size = resource_size(cfg_res)/2;
+ pp->cfg.start = cfg_res->start;
pp->cfg0_base = cfg_res->start;
pp->cfg1_base = cfg_res->start + pp->config.cfg0_size;