diff options
| author | Desnes A. Nunes do Rosario <desnesn@linux.vnet.ibm.com> | 2018-04-10 14:51:06 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-04-11 08:46:50 -0500 |
| commit | adf58458bcb2890efe94e5a58506c27bfecf518d (patch) | |
| tree | e4173ccd28b09383df5b10b0420093ef7eccd76f /drivers/pci | |
| parent | 1b30dfd376e28e7f37eda5e2033f6823cdda222b (diff) | |
PCI: Remove messages about reassigning resources
When reassigning device resources to increase their alignment, e.g.,
because of a "pci=resource_alignment=" kernel parameter or because the
platform aligns resources to its page size, we previously emitted messages
like this:
pci 0000:00:00.0: Disabling memory decoding and releasing memory resources
pci 0000:00:00.0: disabling bridge mem windows
These messages don't convey any useful information, so remove them.
Fixes: 38274637699 ("powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned")
Signed-off-by: Desnes A. Nunes do Rosario <desnesn@linux.vnet.ibm.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci.c | 1 | ||||
| -rw-r--r-- | drivers/pci/setup-res.c | 2 |
2 files changed, 0 insertions, 3 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index aa86e904f93c..e597655a5643 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5628,7 +5628,6 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) return; } - pci_info(dev, "Disabling memory decoding and releasing memory resources\n"); pci_read_config_word(dev, PCI_COMMAND, &command); command &= ~PCI_COMMAND_MEMORY; pci_write_config_word(dev, PCI_COMMAND, command); diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 0cd83a4bd4c8..d8ca40a97693 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -168,8 +168,6 @@ EXPORT_SYMBOL(pci_claim_resource); void pci_disable_bridge_window(struct pci_dev *dev) { - pci_info(dev, "disabling bridge mem windows\n"); - /* MMIO Base/Limit */ pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0); |