diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2018-06-06 16:10:24 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-06-06 16:10:24 -0500 |
commit | bdc4bb13773955d33f8fd23d79afbc95fda8dca4 (patch) | |
tree | 2efd1406256547eeba91529ed0aa24c57182507f /drivers/pci | |
parent | fd83941d50cbbe70e9dc1929d8f4631dd56d8c62 (diff) | |
parent | 2435cdd0c3bb8ad067efb1b2f4c992f680c50b7c (diff) |
Merge branch 'lorenzo/pci/armada8k'
- enable register clock for Armada 7K/8K (Gregory CLEMENT)
* lorenzo/pci/armada8k:
PCI: armada8k: Fix clock resource by adding a register clock
PCI: armada8k: Remove useless test before clk_disable_unprepare()
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/dwc/pcie-armada8k.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/pci/dwc/pcie-armada8k.c b/drivers/pci/dwc/pcie-armada8k.c index b587352f8b9f..072fd7ecc29f 100644 --- a/drivers/pci/dwc/pcie-armada8k.c +++ b/drivers/pci/dwc/pcie-armada8k.c @@ -28,6 +28,7 @@ struct armada8k_pcie { struct dw_pcie *pci; struct clk *clk; + struct clk *clk_reg; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -229,26 +230,38 @@ static int armada8k_pcie_probe(struct platform_device *pdev) if (ret) return ret; + pcie->clk_reg = devm_clk_get(dev, "reg"); + if (pcie->clk_reg == ERR_PTR(-EPROBE_DEFER)) { + ret = -EPROBE_DEFER; + goto fail; + } + if (!IS_ERR(pcie->clk_reg)) { + ret = clk_prepare_enable(pcie->clk_reg); + if (ret) + goto fail_clkreg; + } + /* Get the dw-pcie unit configuration/control registers base. */ base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); pci->dbi_base = devm_pci_remap_cfg_resource(dev, base); if (IS_ERR(pci->dbi_base)) { dev_err(dev, "couldn't remap regs base %p\n", base); ret = PTR_ERR(pci->dbi_base); - goto fail; + goto fail_clkreg; } platform_set_drvdata(pdev, pcie); ret = armada8k_add_pcie_port(pcie, pdev); if (ret) - goto fail; + goto fail_clkreg; return 0; +fail_clkreg: + clk_disable_unprepare(pcie->clk_reg); fail: - if (!IS_ERR(pcie->clk)) - clk_disable_unprepare(pcie->clk); + clk_disable_unprepare(pcie->clk); return ret; } |