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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2023-06-19 20:34:00 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-07-27 08:37:36 +0200
commit35c95eda7b6d9883d1cc9bb1f89d454baa140ebc (patch)
treea48bed71e9b9c2d74bbf977c3348e2d7570803b2 /drivers/pci
parentb0aac779252577d54513bd23865bef7d6a6faf41 (diff)
PCI: qcom: Disable write access to read only registers for IP v2.3.3
commit a33d700e8eea76c62120cb3dbf5e01328f18319a upstream. In the post init sequence of v2.9.0, write access to read only registers are not disabled after updating the registers. Fix it by disabling the access after register update. Link: https://lore.kernel.org/r/20230619150408.8468-2-manivannan.sadhasivam@linaro.org Fixes: 5d76117f070d ("PCI: qcom: Add support for IPQ8074 PCIe controller") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Cc: <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/controller/dwc/pcie-qcom.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 17f411772f0c..24dbb6968831 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -807,6 +807,8 @@ static int qcom_pcie_get_resources_2_4_0(struct qcom_pcie *pcie)
return PTR_ERR(res->phy_ahb_reset);
}
+ dw_pcie_dbi_ro_wr_dis(pci);
+
return 0;
}