diff options
| author | Yinghai Lu <yinghai@kernel.org> | 2014-08-22 18:15:12 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-23 10:03:59 -0600 |
| commit | 31ff2a5e42f459f36a88afa82244dd3d3285572e (patch) | |
| tree | 61970da1588c32c538b4f1de6edcbad0f8e2eaa5 /drivers/pci | |
| parent | cf8d7b589c53f17e10e9f1ef91dd9e2ba3ca9a7c (diff) | |
PCI: pciehp: Stop disabling notifications during init
During pciehp initialization, we previously wrote two hotplug commands:
pciehp_probe
pcie_init
pcie_disable_notification
pcie_write_cmd # command 1
pcie_init_notification
pcie_enable_notification
pcie_write_cmd # command 2
For controllers with errata like Intel CF118, we previously waited for a
timeout before issuing the second hotplug command because the first command
only updates interrupt enable bits and is not a "real" hotplug command, so
the controller doesn't report Command Completed for it.
But there's no need to disable notifications in the first place. If BIOS
left them enabled, we could easily take an interrupt before disabling them,
so there's no benefit in disabling them for the tiny window before we
enable them.
Drop the unnecessary pcie_disable_notification() call.
[bhelgaas: changelog]
Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 5a0a50327a91..f0dc6cb9c5be 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -793,9 +793,6 @@ struct controller *pcie_init(struct pcie_device *dev) PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC | PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC); - /* Disable software notification */ - pcie_disable_notification(ctrl); - ctrl_info(ctrl, "Slot #%d AttnBtn%c AttnInd%c PwrInd%c PwrCtrl%c MRL%c Interlock%c NoCompl%c LLActRep%c\n", (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19, FLAG(slot_cap, PCI_EXP_SLTCAP_ABP), |