diff options
author | Li Jun <jun.li@nxp.com> | 2017-07-15 04:22:30 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
commit | 6d7dbc1832940eb626fd84ecef1d50d782e5b8cb (patch) | |
tree | daf4b1ea7652d92c12bf63d67b89f081ce03e3d9 /drivers/phy | |
parent | 523f0a7c00910d6cbca0ee5d34ca537565eb9ee5 (diff) |
MLK-16013-2 phy: add imx8mq usb phy driver
Use generic phy driver for i.mx8mq USB3 phy reset and clock enable.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r-- | drivers/phy/Kconfig | 5 | ||||
-rw-r--r-- | drivers/phy/Makefile | 1 | ||||
-rw-r--r-- | drivers/phy/phy-fsl-imx8mq-usb.c | 130 |
3 files changed, 136 insertions, 0 deletions
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index af1bbb87d618..317fbd299fd0 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -503,4 +503,9 @@ config PHY_MIXEL_LVDS_COMBO select GENERIC_PHY default ARCH_FSL_IMX8QXP +config PHY_FSL_IMX8MQ_USB + bool + depends on OF + select GENERIC_PHY + default ARCH_FSL_IMX8MQ endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index e80a9879c1b9..87afba03eb2e 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -62,3 +62,4 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o obj-$(CONFIG_PHY_MIXEL_LVDS) += phy-mixel-lvds.o obj-$(CONFIG_PHY_MIXEL_LVDS_COMBO) += phy-mixel-lvds-combo.o +obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o diff --git a/drivers/phy/phy-fsl-imx8mq-usb.c b/drivers/phy/phy-fsl-imx8mq-usb.c new file mode 100644 index 000000000000..5d6e9198a6ab --- /dev/null +++ b/drivers/phy/phy-fsl-imx8mq-usb.c @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2017 NXP. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/phy/phy.h> +#include <linux/io.h> + +#define PHY_CTRL0 0x0 +#define PHY_CTRL0_REF_SSP_EN BIT(2) + +#define PHY_CTRL1 0x4 +#define PHY_CTRL1_RESET BIT(0) +#define PHY_CTRL1_ATERESET BIT(3) +#define PHY_CTRL1_VDATSRCENB0 BIT(19) +#define PHY_CTRL1_VDATDETENB0 BIT(20) + +#define PHY_CTRL2 0x8 +#define PHY_CTRL2_TXENABLEN0 BIT(8) + +struct imx8mq_usb_phy { + struct phy *phy; + struct clk *clk; + void __iomem *base; +}; + +static int imx8mq_phy_start(struct phy *_phy) +{ + struct imx8mq_usb_phy *phy = phy_get_drvdata(_phy); + + return clk_prepare_enable(phy->clk); +} + +static int imx8mq_phy_exit(struct phy *_phy) +{ + struct imx8mq_usb_phy *phy = phy_get_drvdata(_phy); + + clk_disable_unprepare(phy->clk); + + return 0; +} + +static struct phy_ops imx8mq_usb_phy_ops = { + .init = imx8mq_phy_start, + .exit = imx8mq_phy_exit, + .owner = THIS_MODULE, +}; + +static void imx8mq_usb_phy_init(struct imx8mq_usb_phy *phy) +{ + u32 value; + + value = readl(phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0); + value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET; + writel(value, phy->base + PHY_CTRL1); + + value = readl(phy->base + PHY_CTRL0); + value |= PHY_CTRL0_REF_SSP_EN; + writel(value, phy->base + PHY_CTRL0); + + value = readl(phy->base + PHY_CTRL2); + value |= PHY_CTRL2_TXENABLEN0; + writel(value, phy->base + PHY_CTRL2); + + value = readl(phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET); + writel(value, phy->base + PHY_CTRL1); +} + +static int imx8mq_usb_phy_probe(struct platform_device *pdev) +{ + struct phy_provider *phy_provider; + struct device *dev = &pdev->dev; + struct imx8mq_usb_phy *imx_phy; + struct resource *res; + + imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL); + if (!imx_phy) + return -ENOMEM; + + imx_phy->clk = devm_clk_get(dev, "usb_phy_root_clk"); + if (IS_ERR(imx_phy->clk)) { + dev_err(dev, "failed to get imx8mq usb phy clock\n"); + return PTR_ERR(imx_phy->clk); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + imx_phy->base = devm_ioremap_resource(dev, res); + if (IS_ERR(imx_phy->base)) + return PTR_ERR(imx_phy->base); + + imx_phy->phy = devm_phy_create(dev, NULL, &imx8mq_usb_phy_ops); + if (IS_ERR(imx_phy->phy)) + return PTR_ERR(imx_phy->phy); + + phy_set_drvdata(imx_phy->phy, imx_phy); + + imx8mq_usb_phy_init(imx_phy); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id imx8mq_usb_phy_of_match[] = { + {.compatible = "fsl,imx8mq-usb-phy",}, + { }, +}; +MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match); + +static struct platform_driver imx8mq_usb_phy_driver = { + .probe = imx8mq_usb_phy_probe, + .driver = { + .name = "imx8mq-usb-phy", + .of_match_table = imx8mq_usb_phy_of_match, + } +}; +module_platform_driver(imx8mq_usb_phy_driver); + +MODULE_DESCRIPTION("FSL IMX8MQ USB PHY driver"); +MODULE_ALIAS("platform:imx8mq-usb-phy"); +MODULE_LICENSE("GPL"); |