diff options
| author | Li Jun <jun.li@nxp.com> | 2017-08-08 21:24:21 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | efcca4b0475f07af2e97a605993a0dc13e6fa8da (patch) | |
| tree | 17f45b0eaedd65967bc932d2556e5d4c7123bc42 /drivers/phy | |
| parent | 55c3ae5f29252b84dc38353e89ac46ecb7b13430 (diff) | |
MLK-16013-40 phy: phy-fsl-imx8mq-usb: clear COMMONONN to keep FREECLK running
COMMONONN: This signal controls whether the high-speed Bias and PLL
blocks remain powered—consuming additional current during Suspend and
Sleep modes. As imx8mq USB3 ITP&SOF have to use FREECLK, so clear
COMMONONN to be 0(valid) to make FREECLK always running, this is the
recommended setting from design team.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/phy-fsl-imx8mq-usb.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/phy/phy-fsl-imx8mq-usb.c b/drivers/phy/phy-fsl-imx8mq-usb.c index 5d6e9198a6ab..113bc5b192e1 100644 --- a/drivers/phy/phy-fsl-imx8mq-usb.c +++ b/drivers/phy/phy-fsl-imx8mq-usb.c @@ -18,6 +18,7 @@ #define PHY_CTRL1 0x4 #define PHY_CTRL1_RESET BIT(0) +#define PHY_CTRL1_COMMONONN BIT(1) #define PHY_CTRL1_ATERESET BIT(3) #define PHY_CTRL1_VDATSRCENB0 BIT(19) #define PHY_CTRL1_VDATDETENB0 BIT(20) @@ -58,7 +59,8 @@ static void imx8mq_usb_phy_init(struct imx8mq_usb_phy *phy) u32 value; value = readl(phy->base + PHY_CTRL1); - value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0); + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 | + PHY_CTRL1_COMMONONN); value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET; writel(value, phy->base + PHY_CTRL1); |