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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 10:14:10 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-21 10:14:10 -0800 |
commit | a547df99aad777c1807e23991fa2471693c0e4cc (patch) | |
tree | 8e0a198648483580c9a7aa40efa4927c282fa4b1 /drivers/pinctrl/pinctrl-as3722.c | |
parent | 8e5096607280d4e103389bfe8f8b7decbf538ff6 (diff) | |
parent | fa8cf57c923e86a693a85aff1df579245a27cbb3 (diff) |
Merge tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull bulk pin control changes from Linus Walleij:
"This has been queued and tested for a while. Lots of action here,
like in the GPIO tree, embedded stuff like this is really hot now it
seems. Details in the signed tag. I'm especially happy about the
Qualcomm driver as it is used in such a huge subset of mobile handsets
out there, and these platforms in general need better upstream support
- New driver for the Qualcomm TLMM pin controller and its msm8x74
subdriver.
- New driver for the Broadcom Capri BCM281xx SoC.
- New subdriver for the imx25 pin controller.
- New subdriver for the Tegra124 pin controller.
- Lock GPIO lines as IRQs for select combined pin control and GPIO
drivers for baytrail and sirf.
- Some semi-big refactorings and extenstions to the sirf driver.
- Lots of patching, cleanup and fixing in the Renesas "PFC" driver
and associated subdrivers as usual. It is settling down a little
bit now it seems.
- Minor fixes and incremental updates here and there as usual"
* tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: sunxi: Honor GPIO output initial vaules
pinctrl: capri: add dependency on OF
ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs
ARM: pinctrl: Add Broadcom Capri pinctrl driver
pinctrl: Add pinctrl binding for Broadcom Capri SoCs
pinctrl: Add void * to pinctrl_pin_desc
pinctrl: st: Fix a typo in probe
pinctrl: Fix some typos and grammar issues in the documentation
pinctrl: sirf: lock IRQs when starting them
pinctrl: sirf: put gpio interrupt pin into input status automatically
pinctrl: sirf: use only one irq_domain for the whole device node
pinctrl: single: fix infinite loop caused by bad mask
pinctrl: single: fix pcs_disable with bits_per_mux
pinctrl: single: fix DT bindings documentation
pinctrl: as3722: Set pin to output mode for some function
pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
pinctrl: sunxi: Add Allwinner A20 clock output pin functions
pinctrl/lantiq: fix typo
...
Diffstat (limited to 'drivers/pinctrl/pinctrl-as3722.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-as3722.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-as3722.c b/drivers/pinctrl/pinctrl-as3722.c index b80f1e150f53..92ed4b2e3c07 100644 --- a/drivers/pinctrl/pinctrl-as3722.c +++ b/drivers/pinctrl/pinctrl-as3722.c @@ -250,6 +250,26 @@ static int as3722_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function, return ret; } as_pci->gpio_control[group].io_function = function; + + switch (val) { + case AS3722_GPIO_IOSF_SD0_OUT: + case AS3722_GPIO_IOSF_PWR_GOOD_OUT: + case AS3722_GPIO_IOSF_Q32K_OUT: + case AS3722_GPIO_IOSF_PWM_OUT: + case AS3722_GPIO_IOSF_SD6_LOW_VOLT_LOW: + ret = as3722_update_bits(as_pci->as3722, gpio_cntr_reg, + AS3722_GPIO_MODE_MASK, AS3722_GPIO_MODE_OUTPUT_VDDH); + if (ret < 0) { + dev_err(as_pci->dev, "GPIO%d_CTRL update failed %d\n", + group, ret); + return ret; + } + as_pci->gpio_control[group].mode_prop = + AS3722_GPIO_MODE_OUTPUT_VDDH; + break; + default: + break; + } return ret; } |