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authorSaravana Kannan <skannan@codeaurora.org>2012-05-15 13:43:42 -0700
committerMike Turquette <mturquette@linaro.org>2012-05-15 22:42:10 -0700
commit7e0fa1b5fa91d9aa456d102c273b2cf0f2e95d39 (patch)
treee9292f18566fa2289227d2c207a48c798e952618 /drivers/pps
parent1df5c939f6d9dff7dfbe108d93133b9636baa607 (diff)
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
The clk_set_rate() code shouldn't check the clock's enable count when validating CLK_SET_RATE_GATE flag since the enable count could change after the validation. Similar to clk_set_parent(), it should instead check the prepare count. The prepare count should go to zero only when the end user expects the clock to not be enabled in the future. Since the code already grabs the prepare count before validation, it's not possible for prepare count to change after validation and by association not possible for a well behaving end user to enable the clock while the set rate is in progress. Signed-off-by: Saravana Kannan <skannan@codeaurora.org> Reviewed-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/pps')
0 files changed, 0 insertions, 0 deletions