diff options
| author | Leonard Crestez <leonard.crestez@nxp.com> | 2018-06-18 19:26:16 +0300 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:15 +0800 |
| commit | a157b5bd1632751e46dbbfb086a5a3470eb52242 (patch) | |
| tree | 6cbfb89a38921e01861e88acf175624f9eb9f10c /drivers/pwm | |
| parent | 99396ee388b6ee4e4fa2642b92a991703da15676 (diff) | |
MLK-18627 pwm: imx: Add clk_ipg for imx8qm
As part of converting the imx pwm driver to an atomic apply function the
code handling ipg clock was dropped. Add it back because on imx8qm it is
indeed required.
This fixes the same issue as imx_4.9.y commit
ce627dbfd76e ("MLK-16973-4 pwm: imx: Use ipg and per clks in ->config, ->enable and ->disable")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reported-by: Marius Vlad <marius-cristian.vlad@nxp.com>
Tested-by: Marius Vlad <marius-cristian.vlad@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'drivers/pwm')
| -rw-r--r-- | drivers/pwm/pwm-imx.c | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 2ba5c3a398ff..e942ab6c2fd3 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -50,6 +50,7 @@ struct imx_chip { struct clk *clk_per; + struct clk *clk_ipg; void __iomem *mmio_base; @@ -58,6 +59,32 @@ struct imx_chip { #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) +static int imx_pwm_clk_prepare_enable(struct pwm_chip *chip) +{ + struct imx_chip *imx = to_imx_chip(chip); + int ret; + + ret = clk_prepare_enable(imx->clk_per); + if (ret) + return ret; + + ret = clk_prepare_enable(imx->clk_ipg); + if (ret) { + clk_disable_unprepare(imx->clk_per); + return ret; + } + + return 0; +} + +static void imx_pwm_clk_disable_unprepare(struct pwm_chip *chip) +{ + struct imx_chip *imx = to_imx_chip(chip); + + clk_disable_unprepare(imx->clk_ipg); + clk_disable_unprepare(imx->clk_per); +} + static int imx_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -199,7 +226,7 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, if (cstate.enabled) { imx_pwm_wait_fifo_slot(chip, pwm); } else { - ret = clk_prepare_enable(imx->clk_per); + ret = imx_pwm_clk_prepare_enable(chip); if (ret) return ret; @@ -221,7 +248,7 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, } else if (cstate.enabled) { writel(0, imx->mmio_base + MX3_PWMCR); - clk_disable_unprepare(imx->clk_per); + imx_pwm_clk_disable_unprepare(chip); } return 0; @@ -285,6 +312,13 @@ static int imx_pwm_probe(struct platform_device *pdev) return PTR_ERR(imx->clk_per); } + imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(imx->clk_ipg)) { + dev_err(&pdev->dev, "getting ipg clock failed with %ld\n", + PTR_ERR(imx->clk_ipg)); + return PTR_ERR(imx->clk_ipg); + } + imx->chip.ops = data->ops; imx->chip.dev = &pdev->dev; imx->chip.base = -1; |