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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2018-07-10 10:14:17 +0900
committerPhilipp Zabel <p.zabel@pengutronix.de>2018-07-16 12:15:55 +0200
commit499fef09a3237497906084da3eede0185fc9abb8 (patch)
tree22b2a3dbed0be058e66e3c26c97501c90b049fa8 /drivers/reset/reset-uniphier.c
parentef8b023b230bfa3cf1f09ea1b8f1e47e37b389f2 (diff)
reset: uniphier: add USB3 core reset control
Add a reset line to enable USB3 core implemented in UniPhier SoCs. This reuses only the reset operations in reset-simple, because the reset-simple doesn't handle any SoC-dependent clocks and resets. This reset line is included in the USB3 glue layer, and it's necessary to enable clocks and deassert resets of the layer before using this reset line. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/reset/reset-uniphier.c')
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