diff options
| author | James Smart <James.Smart@Emulex.Com> | 2009-11-18 15:41:10 -0500 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@suse.de> | 2009-12-04 12:01:52 -0600 |
| commit | a747c9ce56533e376993473321d96ec8c23a3e43 (patch) | |
| tree | e8ff74c01fa1bbd117acbd461f942a16f14b7b70 /drivers/scsi/lpfc/lpfc_sli4.h | |
| parent | 1c6f4ef5d6be7ef4cbe92a86286217971f52e2cd (diff) | |
[SCSI] lpfc 8.3.6 : Hardware related fixes and changes
Hardware related Fixes and Changes.
- Added new Adapter IDs and update default Adapter names.
- Added PCI read after EQarm doorbell PCI write to flush the write
and avoid spurrious interrupts when in INTx mode.
- Phase out use of ONLINE registers.
- Fix for lost MSI interrupt
Signed-off-by: James Smart <james.smart@emulex.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_sli4.h')
| -rw-r--r-- | drivers/scsi/lpfc/lpfc_sli4.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h index 6a4558ba93b6..25d66d070cf8 100644 --- a/drivers/scsi/lpfc/lpfc_sli4.h +++ b/drivers/scsi/lpfc/lpfc_sli4.h @@ -293,9 +293,8 @@ struct lpfc_sli4_hba { /* BAR0 PCI config space register memory map */ void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */ void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ - void __iomem *ONLINE0regaddr; /* Address to components of internal UE */ - void __iomem *ONLINE1regaddr; /* Address to components of internal UE */ -#define LPFC_ONLINE_NERR 0xFFFFFFFF + void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */ + void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */ void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ /* BAR1 FCoE function CSR register memory map */ void __iomem *STAregaddr; /* Address to HST_STATE register */ @@ -309,6 +308,8 @@ struct lpfc_sli4_hba { void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */ void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */ + uint32_t ue_mask_lo; + uint32_t ue_mask_hi; struct msix_entry *msix_entries; uint32_t cfg_eqn; struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ |