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authorJeff Garzik <jeff@garzik.org>2006-03-24 12:29:39 -0500
committerJeff Garzik <jeff@garzik.org>2006-03-24 12:29:39 -0500
commit4bbf7bc4c7bf1c80ec3c942fa5f1b6e6fa67dd99 (patch)
treec4ff89dc09abe69d58db1e14da22ecda9fdd3ce8 /drivers/scsi/sata_vsc.c
parent84ac69e8bf9f36eb0166817373336d14fa58f5cc (diff)
parentaec5c3c1a929d7d79a420e943285cf3ba26a7c0d (diff)
Merge branch 'upstream'
Conflicts: drivers/scsi/libata-core.c
Diffstat (limited to 'drivers/scsi/sata_vsc.c')
-rw-r--r--drivers/scsi/sata_vsc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index 9f621a97c977..5af6d5f9f4bd 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -237,11 +237,11 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance,
handled += ata_host_intr(ap, qc);
else if (is_vsc_sata_int_err(i, int_status)) {
/*
- * On some chips (i.e. Intel 31244), an error
+ * On some chips (i.e. Intel 31244), an error
* interrupt will sneak in at initialization
* time (phy state changes). Clearing the SCR
* error register is not required, but it prevents
- * the phy state change interrupts from recurring
+ * the phy state change interrupts from recurring
* later.
*/
u32 err_status;