diff options
| author | Jiri Slaby <jirislaby@gmail.com> | 2007-10-18 23:40:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-19 11:53:42 -0700 |
| commit | 5159f40742508e03aed4273a9b3ef06f4e71929f (patch) | |
| tree | baedc0b1ea5187294bc6d4622d254fb448aec0d5 /drivers/serial/amba-pl011.c | |
| parent | b7b5a1282c37e1acf6c10391664ef9d6ad58e933 (diff) | |
amba-pl011, rename BIT macro
amba-pl011, rename BIT macro
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/serial/amba-pl011.c')
| -rw-r--r-- | drivers/serial/amba-pl011.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 72229df9dc11..40604a092921 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c @@ -263,15 +263,15 @@ static unsigned int pl01x_get_mctrl(struct uart_port *port) unsigned int result = 0; unsigned int status = readw(uap->port.membase + UART01x_FR); -#define BIT(uartbit, tiocmbit) \ +#define TIOCMBIT(uartbit, tiocmbit) \ if (status & uartbit) \ result |= tiocmbit - BIT(UART01x_FR_DCD, TIOCM_CAR); - BIT(UART01x_FR_DSR, TIOCM_DSR); - BIT(UART01x_FR_CTS, TIOCM_CTS); - BIT(UART011_FR_RI, TIOCM_RNG); -#undef BIT + TIOCMBIT(UART01x_FR_DCD, TIOCM_CAR); + TIOCMBIT(UART01x_FR_DSR, TIOCM_DSR); + TIOCMBIT(UART01x_FR_CTS, TIOCM_CTS); + TIOCMBIT(UART011_FR_RI, TIOCM_RNG); +#undef TIOCMBIT return result; } @@ -282,18 +282,18 @@ static void pl011_set_mctrl(struct uart_port *port, unsigned int mctrl) cr = readw(uap->port.membase + UART011_CR); -#define BIT(tiocmbit, uartbit) \ +#define TIOCMBIT(tiocmbit, uartbit) \ if (mctrl & tiocmbit) \ cr |= uartbit; \ else \ cr &= ~uartbit - BIT(TIOCM_RTS, UART011_CR_RTS); - BIT(TIOCM_DTR, UART011_CR_DTR); - BIT(TIOCM_OUT1, UART011_CR_OUT1); - BIT(TIOCM_OUT2, UART011_CR_OUT2); - BIT(TIOCM_LOOP, UART011_CR_LBE); -#undef BIT + TIOCMBIT(TIOCM_RTS, UART011_CR_RTS); + TIOCMBIT(TIOCM_DTR, UART011_CR_DTR); + TIOCMBIT(TIOCM_OUT1, UART011_CR_OUT1); + TIOCMBIT(TIOCM_OUT2, UART011_CR_OUT2); + TIOCMBIT(TIOCM_LOOP, UART011_CR_LBE); +#undef TIOCMBIT writew(cr, uap->port.membase + UART011_CR); } |