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authorMichel Pollet <buserror@gmail.com>2010-01-27 16:38:08 +0000
committerBen Dooks <ben-linux@fluff.org>2010-02-03 01:55:01 +0000
commit21030403209f0c253d462492f881c613bd8eeda2 (patch)
tree0c51f42982ef72fcff85fd15cbbcfaa009ebaf73 /drivers/serial/s3c2412.c
parent4b4c662571bb3a19d6bacb4433886ec35c7093fa (diff)
ARM: S3C2412: SoC has the fractional baud rate register
The S3C2412 has a fractional baud rate register, this patch adds the corresponding flag to the UART definition to allow generation of more precise baud rates for the various clock combinations. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'drivers/serial/s3c2412.c')
-rw-r--r--drivers/serial/s3c2412.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28e36ef..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
.name = "Samsung S3C2412 UART",
.type = PORT_S3C2412,
.fifosize = 64,
+ .has_divslot = 1,
.rx_fifomask = S3C2440_UFSTAT_RXMASK,
.rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
.rx_fifofull = S3C2440_UFSTAT_RXFULL,