diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-03-25 21:30:11 +0000 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-03-25 21:30:11 +0000 |
commit | 98639a67a9482fbfc4f9c91b4b59bf0d06b1f6c1 (patch) | |
tree | 89006be038bbcf2d26d999fc785b9c380d734aae /drivers/serial | |
parent | 111c9bf8c5cfa92363b3719c8956d29368b5b9de (diff) |
[SERIAL] amba-pl010: Remove accessor macros
Remove unnecessary accessor macros, using readb/writel directly
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/amba-pl010.c | 110 |
1 files changed, 49 insertions, 61 deletions
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index e04d5e82d9ae..127d6cd5de7f 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c @@ -62,26 +62,8 @@ #define AMBA_ISR_PASS_LIMIT 256 -/* - * Access macros for the AMBA UARTs - */ -#define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR) -#define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR) -#define UART_GET_FR(p) readb((p)->membase + UART01x_FR) -#define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR) -#define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR) -#define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR) -#define UART_GET_CR(p) readb((p)->membase + UART010_CR) -#define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR) -#define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL) -#define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL) -#define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM) -#define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM) -#define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH) -#define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH) #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) -#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0) #define UART_DUMMY_RSR_RX /*256*/0 #define UART_PORT_SIZE 64 @@ -110,36 +92,36 @@ static void pl010_stop_tx(struct uart_port *port) { unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(port->membase + UART010_CR); cr &= ~UART010_CR_TIE; - UART_PUT_CR(port, cr); + writel(cr, port->membase + UART010_CR); } static void pl010_start_tx(struct uart_port *port) { unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(port->membase + UART010_CR); cr |= UART010_CR_TIE; - UART_PUT_CR(port, cr); + writel(cr, port->membase + UART010_CR); } static void pl010_stop_rx(struct uart_port *port) { unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(port->membase + UART010_CR); cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); - UART_PUT_CR(port, cr); + writel(cr, port->membase + UART010_CR); } static void pl010_enable_ms(struct uart_port *port) { unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(port->membase + UART010_CR); cr |= UART010_CR_MSIE; - UART_PUT_CR(port, cr); + writel(cr, port->membase + UART010_CR); } static void @@ -152,9 +134,9 @@ pl010_rx_chars(struct uart_port *port) struct tty_struct *tty = port->info->tty; unsigned int status, ch, flag, rsr, max_count = 256; - status = UART_GET_FR(port); + status = readb(port->membase + UART01x_FR); while (UART_RX_DATA(status) && max_count--) { - ch = UART_GET_CHAR(port); + ch = readb(port->membase + UART01x_DR); flag = TTY_NORMAL; port->icount.rx++; @@ -163,7 +145,7 @@ pl010_rx_chars(struct uart_port *port) * Note that the error handling code is * out of the main execution path */ - rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX; + rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX; if (unlikely(rsr & UART01x_RSR_ANY)) { if (rsr & UART01x_RSR_BE) { rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); @@ -193,7 +175,7 @@ pl010_rx_chars(struct uart_port *port) uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag); ignore_char: - status = UART_GET_FR(port); + status = readb(port->membase + UART01x_FR); } tty_flip_buffer_push(tty); return; @@ -205,7 +187,7 @@ static void pl010_tx_chars(struct uart_port *port) int count; if (port->x_char) { - UART_PUT_CHAR(port, port->x_char); + writel(port->x_char, port->membase + UART01x_DR); port->icount.tx++; port->x_char = 0; return; @@ -217,7 +199,7 @@ static void pl010_tx_chars(struct uart_port *port) count = port->fifosize >> 1; do { - UART_PUT_CHAR(port, xmit->buf[xmit->tail]); + writel(xmit->buf[xmit->tail], port->membase + UART01x_DR); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; if (uart_circ_empty(xmit)) @@ -236,9 +218,9 @@ static void pl010_modem_status(struct uart_port *port) struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int status, delta; - UART_PUT_ICR(&uap->port, 0); + writel(0, uap->port.membase + UART010_ICR); - status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY; + status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; delta = status ^ uap->old_status; uap->old_status = status; @@ -266,7 +248,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs) spin_lock(&port->lock); - status = UART_GET_INT_STATUS(port); + status = readb(port->membase + UART010_IIR); if (status) { do { if (status & (UART010_IIR_RTIS | UART010_IIR_RIS)) @@ -283,7 +265,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs) if (pass_counter-- == 0) break; - status = UART_GET_INT_STATUS(port); + status = readb(port->membase + UART010_IIR); } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | UART010_IIR_TIS)); handled = 1; @@ -296,7 +278,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs) static unsigned int pl010_tx_empty(struct uart_port *port) { - return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; + return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; } static unsigned int pl010_get_mctrl(struct uart_port *port) @@ -304,7 +286,7 @@ static unsigned int pl010_get_mctrl(struct uart_port *port) unsigned int result = 0; unsigned int status; - status = UART_GET_FR(port); + status = readb(port->membase + UART01x_FR); if (status & UART01x_FR_DCD) result |= TIOCM_CAR; if (status & UART01x_FR_DSR) @@ -340,12 +322,12 @@ static void pl010_break_ctl(struct uart_port *port, int break_state) unsigned int lcr_h; spin_lock_irqsave(&port->lock, flags); - lcr_h = UART_GET_LCRH(port); + lcr_h = readb(port->membase + UART010_LCRH); if (break_state == -1) lcr_h |= UART01x_LCRH_BRK; else lcr_h &= ~UART01x_LCRH_BRK; - UART_PUT_LCRH(port, lcr_h); + writel(lcr_h, port->membase + UART010_LCRH); spin_unlock_irqrestore(&port->lock, flags); } @@ -364,13 +346,13 @@ static int pl010_startup(struct uart_port *port) /* * initialise the old status of the modem signals */ - uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY; + uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY; /* * Finally, enable interrupts */ - UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE | - UART010_CR_RTIE); + writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE, + port->membase + UART010_CR); return 0; } @@ -385,11 +367,12 @@ static void pl010_shutdown(struct uart_port *port) /* * disable all interrupts, disable the port */ - UART_PUT_CR(port, 0); + writel(0, port->membase + UART010_CR); /* disable break condition and fifos */ - UART_PUT_LCRH(port, UART_GET_LCRH(port) & - ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN)); + writel(readb(port->membase + UART010_LCRH) & + ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN), + port->membase + UART010_LCRH); } static void @@ -466,25 +449,25 @@ pl010_set_termios(struct uart_port *port, struct termios *termios, port->ignore_status_mask |= UART_DUMMY_RSR_RX; /* first, disable everything */ - old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE; + old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE; if (UART_ENABLE_MS(port, termios->c_cflag)) old_cr |= UART010_CR_MSIE; - UART_PUT_CR(port, 0); + writel(0, port->membase + UART010_CR); /* Set baud rate */ quot -= 1; - UART_PUT_LCRM(port, ((quot & 0xf00) >> 8)); - UART_PUT_LCRL(port, (quot & 0xff)); + writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM); + writel(quot & 0xff, port->membase + UART010_LCRL); /* * ----------v----------v----------v----------v----- * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L * ----------^----------^----------^----------^----- */ - UART_PUT_LCRH(port, lcr_h); - UART_PUT_CR(port, old_cr); + writel(lcr_h, port->membase + UART010_LCRH); + writel(old_cr, port->membase + UART010_CR); spin_unlock_irqrestore(&port->lock, flags); } @@ -593,9 +576,13 @@ static struct uart_amba_port amba_ports[UART_NR] = { static void pl010_console_putchar(struct uart_port *port, int ch) { - while (!UART_TX_READY(UART_GET_FR(port))) + unsigned int status; + + do { + status = readb(port->membase + UART01x_FR); barrier(); - UART_PUT_CHAR(port, ch); + } while (!UART_TX_READY(status)); + writel(ch, port->membase + UART01x_DR); } static void @@ -607,8 +594,8 @@ pl010_console_write(struct console *co, const char *s, unsigned int count) /* * First save the CR then disable the interrupts */ - old_cr = UART_GET_CR(port); - UART_PUT_CR(port, UART01x_CR_UARTEN); + old_cr = readb(port->membase + UART010_CR); + writel(UART01x_CR_UARTEN, port->membase + UART010_CR); uart_console_write(port, s, count, pl010_console_putchar); @@ -617,18 +604,19 @@ pl010_console_write(struct console *co, const char *s, unsigned int count) * and restore the TCR */ do { - status = UART_GET_FR(port); + status = readb(port->membase + UART01x_FR); + barrier(); } while (status & UART01x_FR_BUSY); - UART_PUT_CR(port, old_cr); + writel(old_cr, port->membase + UART010_CR); } static void __init pl010_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) { - if (UART_GET_CR(port) & UART01x_CR_UARTEN) { + if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) { unsigned int lcr_h, quot; - lcr_h = UART_GET_LCRH(port); + lcr_h = readb(port->membase + UART010_LCRH); *parity = 'n'; if (lcr_h & UART01x_LCRH_PEN) { @@ -643,7 +631,7 @@ pl010_console_get_options(struct uart_port *port, int *baud, else *bits = 8; - quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8; + quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8; *baud = port->uartclk / (16 * (quot + 1)); } } |