diff options
author | Pradeep Goudagunta <pgoudagunta@nvidia.com> | 2011-02-01 19:06:19 +0530 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:51:00 -0700 |
commit | cfc6c36834dfea6d7ffb945b616d1542c204ea72 (patch) | |
tree | 2efa8ccfb059a933ae6f22d2c8c6d50d377ba9c3 /drivers/serial | |
parent | cdc846cf43b9063de22f5d4ab91a409c6a149196 (diff) |
arm: serial: tegra: Setting tx trigger level to 8 bytes
Changed transmit fcr trigger level and load size of serial8250 driver
to 8 bytes.
Bug : 785316
Original-Change-Id: I3aac46b05431d17a76c78fe062363af925b2835c
Reviewed-on: http://git-master/r/17885
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: If858d4aa86cc613dc0bbe7cb02c2d7d7778a941f
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/8250.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index f02c07481af0..9459e5c178c7 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -303,8 +303,8 @@ static const struct serial8250_config uart_config[] = { [PORT_TEGRA] = { .name = "Tegra", .fifo_size = 32, - .tx_loadsz = 16, - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_00 | + .tx_loadsz = 8, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_01 | UART_FCR_R_TRIG_01, .flags = UART_CAP_FIFO, }, |