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| author | Paul Mundt <lethal@linux-sh.org> | 2010-11-19 16:43:23 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-11-19 16:43:23 +0900 |
| commit | dfcd6e438927ad8c54278e5b1a34a4fe76e57ad2 (patch) | |
| tree | abbf7999568e51141ccc8297bc095d095e1f6f75 /drivers/sh/clk/cpg.c | |
| parent | d53e4307c2f3856167407a1d9b8f8fa001286066 (diff) | |
| parent | f278ea849e15147269190e943937fa82e66078b1 (diff) | |
Merge branch 'common/clkfwk' into sh-fixes-for-linus
Diffstat (limited to 'drivers/sh/clk/cpg.c')
| -rw-r--r-- | drivers/sh/clk/cpg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c index 359e9a322c7b..6172335ae323 100644 --- a/drivers/sh/clk/cpg.c +++ b/drivers/sh/clk/cpg.c @@ -131,7 +131,7 @@ static int sh_clk_div6_enable(struct clk *clk) unsigned long value; int ret; - ret = sh_clk_div6_set_rate(clk, clk->rate, 0); + ret = sh_clk_div6_set_rate(clk, clk->rate); if (ret == 0) { value = __raw_readl(clk->enable_reg); value &= ~0x100; /* clear stop bit to enable clock */ |