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| author | Thierry Reding <treding@nvidia.com> | 2015-05-04 16:38:28 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:38:30 +0200 |
| commit | b23083a9c6829675d367b4f06a64d74ead82eb14 (patch) | |
| tree | 9737df8839092fff8a54c9181dce3a0fc4b194bb /drivers/soc | |
| parent | 03b3f4c8b76180ba5bd800c57a7efdb142c2341d (diff) | |
soc/tegra: fuse: Add spare bit offset for Tegra114
The offset of the first spare bit register on Tegra114 is 0x280, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra30.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c index 1e184f5dc31b..1fb64f842e41 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -121,6 +121,7 @@ const struct tegra_fuse_soc tegra30_fuse_soc = { static const struct tegra_fuse_info tegra114_fuse_info = { .read = tegra30_fuse_read, .size = 0x2a0, + .spare = 0x180, }; const struct tegra_fuse_soc tegra114_fuse_soc = { |