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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-09-28 18:57:03 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-22 14:39:17 -0700 |
| commit | 59ebd41e415d16748e12dea1f0c8ecdfd30fb410 (patch) | |
| tree | 917c9739acf18a21d3fe9f29090357e18689fbf0 /drivers/spi/spi-coldfire-qspi.c | |
| parent | 57c65c9ade04e30998329487cce0f1a13c45d1ca (diff) | |
dmaengine: dw: properly read DWC_PARAMS register
commit 6bea0f6d1c47b07be88dfd93f013ae05fcb3d8bf upstream.
In case we have less than maximum allowed channels (8) and autoconfiguration is
enabled the DWC_PARAMS read is wrong because it uses different arithmetic to
what is needed for channel priority setup.
Re-do the caclulations properly. This now works on AVR32 board well.
Fixes: fed2574b3c9f (dw_dmac: introduce software emulation of LLP transfers)
Cc: yitian.bu@tangramtek.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/spi/spi-coldfire-qspi.c')
0 files changed, 0 insertions, 0 deletions