diff options
author | Brett Rudley <brudley@broadcom.com> | 2010-11-23 15:30:02 -0800 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-11-29 11:37:51 -0800 |
commit | fa7a1db200ecb7a5912722a563646935700765a8 (patch) | |
tree | b5663c724c251316baf2e0eee4f6cd334eb39d31 /drivers/staging/brcm80211/util | |
parent | c95e66e1fae810110410b59f411110ca671ffb28 (diff) |
staging: brcm80211: Remove BUSTYPE macro
BUSTYPE isn't used in this configuration.
Signed-off-by: Brett Rudley <brudley@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/brcm80211/util')
-rw-r--r-- | drivers/staging/brcm80211/util/aiutils.c | 8 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/bcmsrom.c | 12 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/hnddma.c | 8 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/nicpci.c | 3 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/sbutils.c | 8 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/siutils.c | 57 |
6 files changed, 44 insertions, 52 deletions
diff --git a/drivers/staging/brcm80211/util/aiutils.c b/drivers/staging/brcm80211/util/aiutils.c index dbb3e369b740..cf900773fa7d 100644 --- a/drivers/staging/brcm80211/util/aiutils.c +++ b/drivers/staging/brcm80211/util/aiutils.c @@ -119,7 +119,7 @@ void ai_scan(si_t *sih, void *regs, uint devid) erombase = R_REG(sii->osh, &cc->eromptr); - switch (BUSTYPE(sih->bustype)) { + switch (sih->bustype) { case SI_BUS: eromptr = (u32 *) REG_MAP(erombase, SI_CORE_SIZE); break; @@ -334,7 +334,7 @@ void *ai_setcoreidx(si_t *sih, uint coreidx) ASSERT((sii->intrsenabled_fn == NULL) || !(*(sii)->intrsenabled_fn) ((sii)->intr_arg)); - switch (BUSTYPE(sih->bustype)) { + switch (sih->bustype) { case SI_BUS: /* map new one */ if (!sii->regs[coreidx]) { @@ -508,7 +508,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) if (coreidx >= SI_MAXCORES) return 0; - if (BUSTYPE(sih->bustype) == SI_BUS) { + if (sih->bustype == SI_BUS) { /* If internal bus, we can always get at everything */ fast = true; /* map if does not exist */ @@ -518,7 +518,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) ASSERT(GOODREGS(sii->regs[coreidx])); } r = (u32 *) ((unsigned char *) sii->regs[coreidx] + regoff); - } else if (BUSTYPE(sih->bustype) == PCI_BUS) { + } else if (sih->bustype == PCI_BUS) { /* If pci/pcie, we can get at pci/pcie regs and on newer cores to chipc */ if ((sii->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { diff --git a/drivers/staging/brcm80211/util/bcmsrom.c b/drivers/staging/brcm80211/util/bcmsrom.c index 7240e3c11c5c..af4658e4d67e 100644 --- a/drivers/staging/brcm80211/util/bcmsrom.c +++ b/drivers/staging/brcm80211/util/bcmsrom.c @@ -164,14 +164,14 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, len = 0; - ASSERT(bustype == BUSTYPE(bustype)); + ASSERT(bustype == bustype); if (vars == NULL || count == NULL) return 0; *vars = NULL; *count = 0; - switch (BUSTYPE(bustype)) { + switch (bustype) { case SI_BUS: case JTAG_BUS: return initvars_srom_si(sih, osh, curmap, vars, count); @@ -204,7 +204,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, uint i; #endif /* BCMSDIO */ - ASSERT(bustype == BUSTYPE(bustype)); + ASSERT(bustype == bustype); /* check input - 16-bit access only */ if (byteoff & 1 || nbytes & 1 || (byteoff + nbytes) > SROM_MAX) @@ -213,7 +213,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, off = byteoff / 2; nw = nbytes / 2; - if (BUSTYPE(bustype) == PCI_BUS) { + if (bustype == PCI_BUS) { if (!curmap) return 1; @@ -235,7 +235,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, } #endif #ifdef BCMSDIO - } else if (BUSTYPE(bustype) == SDIO_BUS) { + } else if (bustype == SDIO_BUS) { off = byteoff / 2; nw = nbytes / 2; for (i = 0; i < nw; i++) { @@ -244,7 +244,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, return 1; } #endif /* BCMSDIO */ - } else if (BUSTYPE(bustype) == SI_BUS) { + } else if (bustype == SI_BUS) { return 1; } else { return 1; diff --git a/drivers/staging/brcm80211/util/hnddma.c b/drivers/staging/brcm80211/util/hnddma.c index c9dddcdb1099..3c85aa584d8f 100644 --- a/drivers/staging/brcm80211/util/hnddma.c +++ b/drivers/staging/brcm80211/util/hnddma.c @@ -2666,8 +2666,8 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) /* backplane are 64-bit capable */ if (si_backplane64(sih)) /* If bus is System Backplane or PCIE then we can access 64-bits */ - if ((BUSTYPE(sih->bustype) == SI_BUS) || - ((BUSTYPE(sih->bustype) == PCI_BUS) && + if ((sih->bustype == SI_BUS) || + ((sih->bustype == PCI_BUS) && (sih->buscoretype == PCIE_CORE_ID))) return DMADDRWIDTH_64; @@ -2681,8 +2681,8 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) dma32regs = (dma32regs_t *) dmaregs; /* For System Backplane, PCIE bus or addrext feature, 32-bits ok */ - if ((BUSTYPE(sih->bustype) == SI_BUS) || - ((BUSTYPE(sih->bustype) == PCI_BUS) + if ((sih->bustype == SI_BUS) || + ((sih->bustype == PCI_BUS) && sih->buscoretype == PCIE_CORE_ID) || (_dma32_addrext(osh, dma32regs))) return DMADDRWIDTH_32; diff --git a/drivers/staging/brcm80211/util/nicpci.c b/drivers/staging/brcm80211/util/nicpci.c index 2127cc903223..1adac0783369 100644 --- a/drivers/staging/brcm80211/util/nicpci.c +++ b/drivers/staging/brcm80211/util/nicpci.c @@ -47,7 +47,8 @@ typedef struct { /* debug/trace */ #define PCI_ERROR(args) -#define PCIE_PUB(sih) ((BUSTYPE((sih)->bustype) == PCI_BUS) && ((sih)->buscoretype == PCIE_CORE_ID)) +#define PCIE_PUB(sih) \ + (((sih)->bustype == PCI_BUS) && ((sih)->buscoretype == PCIE_CORE_ID)) /* routines to access mdio slave device registers */ static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk); diff --git a/drivers/staging/brcm80211/util/sbutils.c b/drivers/staging/brcm80211/util/sbutils.c index 82767e266e97..7b93ac22d4fc 100644 --- a/drivers/staging/brcm80211/util/sbutils.c +++ b/drivers/staging/brcm80211/util/sbutils.c @@ -90,7 +90,7 @@ static u32 _sb_coresba(si_info_t *sii) { u32 sbaddr = 0; - switch (BUSTYPE(sii->pub.bustype)) { + switch (sii->pub.bustype) { case SPI_BUS: case SDIO_BUS: sbaddr = (u32)(unsigned long)sii->curmap; @@ -347,7 +347,7 @@ static void *_sb_setcoreidx(si_info_t *sii, uint coreidx) u32 sbaddr = sii->coresba[coreidx]; void *regs; - switch (BUSTYPE(sii->pub.bustype)) { + switch (sii->pub.bustype) { #ifdef BCMSDIO case SPI_BUS: case SDIO_BUS: @@ -412,8 +412,8 @@ bool sb_taclear(si_t *sih, bool details) sii = SI_INFO(sih); - if ((BUSTYPE(sii->pub.bustype) == SDIO_BUS) || - (BUSTYPE(sii->pub.bustype) == SPI_BUS)) { + if ((sii->pub.bustype == SDIO_BUS) || + (sii->pub.bustype == SPI_BUS)) { INTR_OFF(sii, intr_val); origidx = si_coreidx(sih); diff --git a/drivers/staging/brcm80211/util/siutils.c b/drivers/staging/brcm80211/util/siutils.c index e13053626d29..050c2d248978 100644 --- a/drivers/staging/brcm80211/util/siutils.c +++ b/drivers/staging/brcm80211/util/siutils.c @@ -117,12 +117,12 @@ static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid, #ifndef BRCM_FULLMAC /* kludge to enable the clock on the 4306 which lacks a slowclock */ - if (BUSTYPE(bustype) == PCI_BUS && !si_ispcie(sii)) + if (bustype == PCI_BUS && !si_ispcie(sii)) si_clkctl_xtal(&sii->pub, XTAL | PLL, ON); #endif #if defined(BCMSDIO) - if (BUSTYPE(bustype) == SDIO_BUS) { + if (bustype == SDIO_BUS) { int err; u8 clkset; @@ -224,7 +224,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, SI_VMSG(("CORE[%d]: id 0x%x rev %d base 0x%x regs 0x%p\n", i, cid, crev, sii->coresba[i], sii->regs[i])); - if (BUSTYPE(bustype) == PCI_BUS) { + if (bustype == PCI_BUS) { if (cid == PCI_CORE_ID) { pciidx = i; pcirev = crev; @@ -236,8 +236,8 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, } } #ifdef BCMSDIO - else if (((BUSTYPE(bustype) == SDIO_BUS) || - (BUSTYPE(bustype) == SPI_BUS)) && + else if (((bustype == SDIO_BUS) || + (bustype == SPI_BUS)) && ((cid == PCMCIA_CORE_ID) || (cid == SDIOD_CORE_ID))) { sii->pub.buscorerev = crev; sii->pub.buscoretype = cid; @@ -259,7 +259,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, * or downloaded code was * already running. */ - if ((BUSTYPE(bustype) == SDIO_BUS) || (BUSTYPE(bustype) == SPI_BUS)) { + if ((bustype == SDIO_BUS) || (bustype == SPI_BUS)) { if (si_setcore(&sii->pub, ARM7S_CORE_ID, 0) || si_setcore(&sii->pub, ARMCM3_CORE_ID, 0)) si_core_disable(&sii->pub, 0); @@ -285,7 +285,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, sii->pub.buscoretype, sii->pub.buscorerev)); /* fixup necessary chip/core configurations */ - if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { + if (sii->pub.bustype == PCI_BUS) { if (SI_FAST(sii)) { if (!sii->pch) { sii->pch = (void *)pcicore_init( @@ -312,7 +312,7 @@ static __used void si_nvram_process(si_info_t *sii, char *pvars) uint w = 0; /* get boardtype and boardrev */ - switch (BUSTYPE(sii->pub.bustype)) { + switch (sii->pub.bustype) { case PCI_BUS: /* do a pci config read to get subsystem id and subvendor id */ pci_read_config_dword(sii->osh->pdev, PCI_CFG_SVID, &w); @@ -394,11 +394,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, cc = (chipcregs_t *) sii->curmap; sih->bustype = bustype; - if (bustype != BUSTYPE(bustype)) { - SI_ERROR(("si_doattach: bus type %d does not match configured bus type %d\n", bustype, BUSTYPE(bustype))); - return NULL; - } - /* bus/core/clk setup for register access */ if (!si_buscore_prep(sii, bustype, devid, sdh)) { SI_ERROR(("si_doattach: si_core_clk_prep failed %d\n", @@ -448,7 +443,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, /* Init nvram from sprom/otp if they exist */ if (srom_var_init - (&sii->pub, BUSTYPE(bustype), regs, sii->osh, vars, varsz)) { + (&sii->pub, bustype, regs, sii->osh, vars, varsz)) { SI_ERROR(("si_doattach: srom_var_init failed: bad srom\n")); goto exit; } @@ -549,10 +544,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, } sih->bustype = bustype; - if (bustype != BUSTYPE(bustype)) { - SI_ERROR(("si_doattach: bus type %d does not match configured bus type %d\n", bustype, BUSTYPE(bustype))); - return NULL; - } /* bus/core/clk setup for register access */ if (!si_buscore_prep(sii, bustype, devid, sdh)) { @@ -620,7 +611,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, /* Init nvram from sprom/otp if they exist */ if (srom_var_init - (&sii->pub, BUSTYPE(bustype), regs, sii->osh, vars, varsz)) { + (&sii->pub, bustype, regs, sii->osh, vars, varsz)) { SI_ERROR(("si_doattach: srom_var_init failed: bad srom\n")); goto exit; } @@ -691,7 +682,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, return sii; exit: - if (BUSTYPE(sih->bustype) == PCI_BUS) { + if (sih->bustype == PCI_BUS) { if (sii->pch) pcicore_deinit(sii->pch); sii->pch = NULL; @@ -715,7 +706,7 @@ void si_detach(si_t *sih) if (sii == NULL) return; - if (BUSTYPE(sih->bustype) == SI_BUS) + if (sih->bustype == SI_BUS) for (idx = 0; idx < SI_MAXCORES; idx++) if (sii->regs[idx]) { REG_UNMAP(sii->regs[idx]); @@ -725,7 +716,7 @@ void si_detach(si_t *sih) #ifndef BRCM_FULLMAC nvram_exit((void *)si_local); /* free up nvram buffers */ - if (BUSTYPE(sih->bustype) == PCI_BUS) { + if (sih->bustype == PCI_BUS) { if (sii->pch) pcicore_deinit(sii->pch); sii->pch = NULL; @@ -1097,7 +1088,7 @@ static uint si_slowclk_src(si_info_t *sii) ASSERT(SI_FAST(sii) || si_coreid(&sii->pub) == CC_CORE_ID); if (sii->pub.ccrev < 6) { - if (BUSTYPE(sii->pub.bustype) == PCI_BUS) { + if (sii->pub.bustype == PCI_BUS) { pci_read_config_dword(sii->osh->pdev, PCI_GPIO_OUT, &val); if (val & PCI_CFG_GPIO_SCS) @@ -1273,7 +1264,7 @@ int si_clkctl_xtal(si_t *sih, uint what, bool on) sii = SI_INFO(sih); - switch (BUSTYPE(sih->bustype)) { + switch (sih->bustype) { #ifdef BCMSDIO case SDIO_BUS: @@ -1384,7 +1375,7 @@ static bool _si_clkctl_cc(si_info_t *sii, uint mode) INTR_OFF(sii, intr_val); origidx = sii->curidx; - if ((BUSTYPE(sii->pub.bustype) == SI_BUS) && + if ((sii->pub.bustype == SI_BUS) && si_setcore(&sii->pub, MIPS33_CORE_ID, 0) && (si_corerev(&sii->pub) <= 7) && (sii->pub.ccrev >= 10)) goto done; @@ -1466,7 +1457,7 @@ int si_devpath(si_t *sih, char *path, int size) if (!path || size <= 0) return -1; - switch (BUSTYPE(sih->bustype)) { + switch (sih->bustype) { case SI_BUS: case JTAG_BUS: slen = snprintf(path, (size_t) size, "sb/%u/", si_coreidx(sih)); @@ -1556,7 +1547,7 @@ static __used bool si_ispcie(si_info_t *sii) { u8 cap_ptr; - if (BUSTYPE(sii->pub.bustype) != PCI_BUS) + if (sii->pub.bustype != PCI_BUS) return false; cap_ptr = @@ -1623,7 +1614,7 @@ void si_pci_up(si_t *sih) sii = SI_INFO(sih); /* if not pci bus, we're done */ - if (BUSTYPE(sih->bustype) != PCI_BUS) + if (sih->bustype != PCI_BUS) return; if (PCI_FORCEHT(sii)) @@ -1652,7 +1643,7 @@ void si_pci_down(si_t *sih) sii = SI_INFO(sih); /* if not pci bus, we're done */ - if (BUSTYPE(sih->bustype) != PCI_BUS) + if (sih->bustype != PCI_BUS) return; /* release FORCEHT since chip is going to "down" state */ @@ -1675,7 +1666,7 @@ void si_pci_setup(si_t *sih, uint coremask) sii = SI_INFO(sih); - if (BUSTYPE(sii->pub.bustype) != PCI_BUS) + if (sii->pub.bustype != PCI_BUS) return; ASSERT(PCI(sii) || PCIE(sii)); @@ -1737,7 +1728,7 @@ int si_pci_fixcfg(si_t *sih) si_info_t *sii = SI_INFO(sih); - ASSERT(BUSTYPE(sii->pub.bustype) == PCI_BUS); + ASSERT(sii->pub.bustype == PCI_BUS); /* Fixup PI in SROM shadow area to enable the correct PCI core access */ /* save the current index */ @@ -1783,7 +1774,7 @@ u32 si_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority) * ignore reservation if it's high priority (e.g., test apps) */ if ((priority != GPIO_HI_PRIORITY) && - (BUSTYPE(sih->bustype) == SI_BUS) && (val || mask)) { + (sih->bustype == SI_BUS) && (val || mask)) { mask = priority ? (si_gpioreservation & mask) : ((si_gpioreservation | mask) & ~(si_gpioreservation)); val &= mask; @@ -1935,7 +1926,7 @@ bool si_deviceremoved(si_t *sih) sii = SI_INFO(sih); - switch (BUSTYPE(sih->bustype)) { + switch (sih->bustype) { case PCI_BUS: ASSERT(sii->osh != NULL); pci_read_config_dword(sii->osh->pdev, PCI_CFG_VID, &w); |