diff options
| author | H Hartley Sweeten <hsweeten@visionengravers.com> | 2015-10-05 15:33:14 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-12 21:18:33 -0700 |
| commit | 014d8414ce40e3f2e9733bdde39f474299283290 (patch) | |
| tree | 57348f87156d6186f75cf968aeff39144903e2f7 /drivers/staging/comedi/drivers/multiq3.c | |
| parent | 6dfb66d8992bb0e1244db36b72ba0c5bb05fb858 (diff) | |
staging: comedi: multiq3: document the encoder chip commands
Add some comments to document the commands that are sent to the
encoder chips.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/comedi/drivers/multiq3.c')
| -rw-r--r-- | drivers/staging/comedi/drivers/multiq3.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/staging/comedi/drivers/multiq3.c b/drivers/staging/comedi/drivers/multiq3.c index dac1879fc86f..02d41fc4d82f 100644 --- a/drivers/staging/comedi/drivers/multiq3.c +++ b/drivers/staging/comedi/drivers/multiq3.c @@ -65,17 +65,17 @@ #define MULTIQ3_ENC_CTRL_REG 0x0e /* - * flags for encoder control + * Encoder chip commands (from the programming manual) */ -#define MULTIQ3_CLOCK_DATA 0x00 -#define MULTIQ3_CLOCK_SETUP 0x18 -#define MULTIQ3_INPUT_SETUP 0x41 -#define MULTIQ3_QUAD_X4 0x38 -#define MULTIQ3_BP_RESET 0x01 -#define MULTIQ3_CNTR_RESET 0x02 -#define MULTIQ3_TRSFRPR_CTR 0x08 -#define MULTIQ3_TRSFRCNTR_OL 0x10 -#define MULTIQ3_EFLAG_RESET 0x06 +#define MULTIQ3_CLOCK_DATA 0x00 /* FCK frequency divider */ +#define MULTIQ3_CLOCK_SETUP 0x18 /* xfer PR0 to PSC */ +#define MULTIQ3_INPUT_SETUP 0x41 /* enable inputs A and B */ +#define MULTIQ3_QUAD_X4 0x38 /* quadrature */ +#define MULTIQ3_BP_RESET 0x01 /* reset byte pointer */ +#define MULTIQ3_CNTR_RESET 0x02 /* reset counter */ +#define MULTIQ3_TRSFRPR_CTR 0x08 /* xfre preset reg to counter */ +#define MULTIQ3_TRSFRCNTR_OL 0x10 /* xfer CNTR to OL (x and y) */ +#define MULTIQ3_EFLAG_RESET 0x06 /* reset E bit of flag reg */ #define MULTIQ3_TIMEOUT 30 |