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authorSudhakar Mamillapalli <sudhakar@fb.com>2012-04-10 14:10:58 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-04-18 16:26:17 -0700
commit0ad372b962d109323d18ac2aa118b2ad100eb8dd (patch)
tree82a9c1308720f9a96ff1432c063125a0695160d4 /drivers/tty/serial/8250/8250.h
parent665ab0f3c8b8f86bb77b25285ac93870c7054d63 (diff)
serial/8250_pci: Clear FIFOs for Intel ME Serial Over Lan device on BI
When using Serial Over Lan (SOL) over the virtual serial port in a Intel management engine (ME) device, on device reset the serial FIFOs need to be cleared to keep the FIFO indexes in-sync between the host and the engine. On a reset the serial device assertes BI, so using that as a cue FIFOs are cleared. So for this purpose a new handle_break callback has been added. One other problem is that the serial registers might temporarily go to 0 on reset of this device. So instead of using the IER register read, if 0 returned use the ier value in uart_8250_port. This is hidden under a custom serial_in. Cc: Nhan H Mai <nhan.h.mai@intel.com> Signed-off-by: Sudhakar Mamillapalli <sudhakar@fb.com> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/8250/8250.h')
-rw-r--r--drivers/tty/serial/8250/8250.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index 2868a1da254d..c9d0ebe952fc 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -96,6 +96,8 @@ static inline void serial_out(struct uart_8250_port *up, int offset, int value)
up->port.serial_out(&up->port, offset, value);
}
+void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
+
#if defined(__alpha__) && !defined(CONFIG_PCI)
/*
* Digital did something really horribly wrong with the OUT1 and OUT2