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authorHuang Shijie <b32955@freescale.com>2012-11-22 15:06:29 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-11-26 15:38:44 -0800
commita5919442bc61846e36011671df0d67c72275337e (patch)
treeba42eed1b2186710c28b5dd71efb389c396a24eb /drivers/tty/serial/mxs-auart.c
parent273a4b8a58840773730e0134fe1af11d399cb7a0 (diff)
serial: mxs-auart: disable the Receive Timeout Interrupt when DMA is enabled
When the DMA is enabled, the Receive Timeout interrupt is very easy to be arised in the 3M baud rate. The interrupt handler (aka mxs_auart_irq_handle) will call mxs_auart_rx_chars() to handle the received data. This is not right, we can not get the correct data from the RXFIFO now, the data have been moved to the DMA buffer by the DMA engine. This patch (1) disables the Receive Timeout Interrupt when the DMA is enabled, (2) and invoke the mxs_auart_rx_chars() only when the DMA is not enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Tested-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/mxs-auart.c')
-rw-r--r--drivers/tty/serial/mxs-auart.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
index 3860ff27467c..f56d6b92cf38 100644
--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -695,7 +695,8 @@ static void mxs_auart_settermios(struct uart_port *u,
!test_and_set_bit(MXS_AUART_DMA_RX_READY, &s->flags)) {
if (!mxs_auart_dma_prep_rx(s)) {
/* Disable the normal RX interrupt. */
- writel(AUART_INTR_RXIEN, u->membase + AUART_INTR_CLR);
+ writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN,
+ u->membase + AUART_INTR_CLR);
} else {
mxs_auart_dma_exit(s);
dev_err(s->dev, "We can not start up the DMA.\n");
@@ -719,7 +720,8 @@ static irqreturn_t mxs_auart_irq_handle(int irq, void *context)
}
if (istat & (AUART_INTR_RTIS | AUART_INTR_RXIS)) {
- mxs_auart_rx_chars(s);
+ if (!auart_dma_enabled(s))
+ mxs_auart_rx_chars(s);
istat &= ~(AUART_INTR_RTIS | AUART_INTR_RXIS);
}