diff options
| author | Tudor Ambarus <tudor.ambarus@linaro.org> | 2024-01-19 10:45:10 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-01-27 19:05:18 -0800 |
| commit | 4f6f9a3f8fc70c2497b30f190702b8321aae16fe (patch) | |
| tree | e4c472831ad1a5048d01f05e78a55f6628ba080a /drivers/tty/serial/samsung_tty.c | |
| parent | 1d3f02abd551c69c6a82b9f22430b497b0bf7c55 (diff) | |
tty: serial: samsung: prepare for different IO types
GS101's Connectivity Peripheral blocks (peric0/1 blocks) which
include the I3C and USI (I2C, SPI, UART) only allow 32-bit
register accesses. If using 8-bit register accesses, a SError
Interrupt is raised causing the system unusable.
Instead of specifying the reg-io-width = 4 everywhere, for each node,
the requirement should be deduced from the compatible.
Prepare the samsung tty driver to allow IO types different than
UPIO_MEM. ``struct uart_port::iotype`` is an unsigned char where all
its 8 bits are exposed to uapi. We can't make NULL checks on it to
verify if it's set, thus always set it from the driver's data.
Use u8 for the ``iotype`` member of ``struct s3c24xx_uart_info`` to
emphasize that the iotype is an 8 bit mask.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119104526.1221243-4-tudor.ambarus@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/samsung_tty.c')
| -rw-r--r-- | drivers/tty/serial/samsung_tty.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 6fdb32b83346..9d3767021f9c 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -84,6 +84,7 @@ struct s3c24xx_uart_info { unsigned long clksel_mask; unsigned long clksel_shift; unsigned long ucon_mask; + u8 iotype; /* uart port features */ @@ -1741,7 +1742,6 @@ static void s3c24xx_serial_init_port_default(int index) { spin_lock_init(&port->lock); - port->iotype = UPIO_MEM; port->uartclk = 0; port->fifosize = 16; port->flags = UPF_BOOT_AUTOCONF; @@ -1988,6 +1988,8 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) break; } + ourport->port.iotype = ourport->info->iotype; + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); @@ -2398,6 +2400,7 @@ static const struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = { .name = "Samsung S3C6400 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .fifosize = 64, .has_divslot = 1, .rx_fifomask = S3C2440_UFSTAT_RXMASK, @@ -2427,6 +2430,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { .name = "Samsung S5PV210 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .has_divslot = 1, .rx_fifomask = S5PV210_UFSTAT_RXMASK, .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, @@ -2456,6 +2460,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { .name = "Samsung Exynos UART", \ .type = TYPE_S3C6400, \ .port_type = PORT_S3C6400, \ + .iotype = UPIO_MEM, \ .has_divslot = 1, \ .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ @@ -2516,6 +2521,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { .name = "Apple S5L UART", .type = TYPE_APPLE_S5L, .port_type = PORT_8250, + .iotype = UPIO_MEM, .fifosize = 16, .rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, @@ -2545,6 +2551,7 @@ static const struct s3c24xx_serial_drv_data artpec8_serial_drv_data = { .name = "Axis ARTPEC-8 UART", .type = TYPE_S3C6400, .port_type = PORT_S3C6400, + .iotype = UPIO_MEM, .fifosize = 64, .has_divslot = 1, .rx_fifomask = S5PV210_UFSTAT_RXMASK, |