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authorSascha Hauer <s.hauer@pengutronix.de>2013-08-26 13:48:36 +0200
committerViresh Kumar <viresh.kumar@linaro.org>2013-08-26 19:34:07 +0530
commitfae19b84724ff93c1ac59ce1eecc1411f8269d9e (patch)
treeec3d8cbd4006c2c45e2afb5725683efc69fc39a3 /drivers/tty/sysrq.c
parentb192b910f3832793082c1a18262c4da0efe121ae (diff)
cpufreq: imx6q: Fix clock enable balance
For changing the cpu frequency the i.MX6q has to be switched to some intermediate clock during the PLL reprogramming. The driver tries to be clever to keep the enable count correct but gets it wrong. If the cpufreq is increased it calls clk_disable_unprepare twice on pll2_pfd2_396m. This puts all other devices which get their clock from pll2_pfd2_396m into a nonworking state. Fix this by removing the clk enabling/disabling altogether since the clk core will do this automatically during a reparent. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'drivers/tty/sysrq.c')
0 files changed, 0 insertions, 0 deletions