diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-02-06 14:57:22 +0800 |
|---|---|---|
| committer | Fugang Duan <b38611@freescale.com> | 2015-02-06 15:14:31 +0800 |
| commit | 52a05b1b63d37727d17c767e67cd2f226d36abf0 (patch) | |
| tree | c31a6cfd3eb544df50b9f40d865514f709af243c /drivers/tty | |
| parent | 877f9357d39d8fd697766dc1fc0c87551111190c (diff) | |
MLK-10225-1 tty: serial: imx: don't restore UBRC register
For i.MX7D, write the read-only register UBRC that causes unhandled fault.
Log:
Unhandled fault: imprecise external abort (0x1c06) at 0x76efd0ac
Bus error
For read-only registers, we don't need to restore it.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/imx.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index d557f1efb405..4a5c69cb700a 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -247,7 +247,7 @@ struct imx_port { struct delayed_work tsk_dma_tx; struct work_struct tsk_dma_rx; wait_queue_head_t dma_wait; - unsigned int saved_reg[11]; + unsigned int saved_reg[10]; #define DMA_TX_IS_WORKING 1 unsigned long flags; }; @@ -1961,8 +1961,7 @@ static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) sport->saved_reg[6] = readl(sport->port.membase + UTIM); sport->saved_reg[7] = readl(sport->port.membase + UBIR); sport->saved_reg[8] = readl(sport->port.membase + UBMR); - sport->saved_reg[9] = readl(sport->port.membase + UBRC); - sport->saved_reg[10] = readl(sport->port.membase + IMX21_UTS); + sport->saved_reg[9] = readl(sport->port.membase + IMX21_UTS); return 0; } @@ -1977,8 +1976,7 @@ static int serial_imx_resume(struct platform_device *dev) writel(sport->saved_reg[6], sport->port.membase + UTIM); writel(sport->saved_reg[7], sport->port.membase + UBIR); writel(sport->saved_reg[8], sport->port.membase + UBMR); - writel(sport->saved_reg[9], sport->port.membase + UBRC); - writel(sport->saved_reg[10], sport->port.membase + IMX21_UTS); + writel(sport->saved_reg[9], sport->port.membase + IMX21_UTS); writel(sport->saved_reg[0], sport->port.membase + UCR1); writel(sport->saved_reg[1] | 0x1, sport->port.membase + UCR2); writel(sport->saved_reg[2], sport->port.membase + UCR3); |